- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98142 > SST89E52RC-33-C-NJE 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC44 PDF資料下載
參數(shù)資料
| 型號： | SST89E52RC-33-C-NJE |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MS-018AC, LCC-44 |
| 文件頁數(shù)： | 32/57頁 |
| 文件大?。?/td> | 652K |
| 代理商： | SST89E52RC-33-C-NJE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當前第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁
38
Data Sheet
FlashFlex MCU
SST89E52RC / SST89E54RC
2007 Silicon Storage Technology, Inc.
S71259-04-000
1/07
8.0 SECURITY LOCK
The security lock protects against software piracy and pre-
vents the contents of the flash from being read by unautho-
rized parties. It also protects against code corruption
resulting from accidental erasing and programming to the
internal flash memory. There are two different types of
security locks in the device security lock system: Chip-
Level Security Lock and Page-Level Security Lock.
8.1 Chip-Level Security Lock
There are four types of chip-level security locks.
1. Disable External MOVC instruction
2. Disable External Host Mode (Except Read Chip
ID and Chip-Erase commands)
3. Disable Boot from External Memory
4. Disable External IAP commands (Except Chip-
Erase commands)
Users can turn on these security locks in any combination
to achieve the security protection scheme. To unlock secu-
rity locks, the Chip-Erase command must be used.
8.1.1 Disable External MOVC instruction
When Disable-Extern-MOVC command is executed either
by External Host Mode command or IAP Mode Command,
MOVC instructions executed from external program mem-
ory are disabled from fetching code bytes from internal
memory.
8.1.2 Disable External Host Mode
When Disable-Extern-Host-Cmd command is executed
either by External Host Mode Command or IAP Mode
Command, all external host mode commands are disabled
except Chip-Erase command and Read-ID command.
Upon activation of this option, the device can not be
accessed through external host mode. User can not verify
and copy the contents of the internal flash
8.1.3 Disable Boot From External Memory
When Disable-Extern-Boot command is executed either by
External Host Mode Command or IAP Mode Command,
the EA pin value will be ignored during chip Reset and
always boot from the internal memory.
8.1.4 Disable External IAP Commands
When Disable-Extern-IAP command is executed either by
External Host Mode Command or IAP Mode Command, all
IAP commands executed from external memory are dis-
abled except Chip-Erase command. All IAP commands
executed from internal memory are allowed if the Page
Lock is not set.
8.2 Page-Level Security Lock
When any of Secure-Page0, Secure-Page1, Secure-
Page2, Secure-Page3, or Secure-Page4 command is exe-
cuted, the individual page (Page0, Page1, Page2, Page3,
or Page4) will enter secured mode. No part of the page can
be verified by either External Host mode commands or IAP
commands. MOVC instructions are also unable to read any
data from the page.
To unlock the security locks on Page0-3 of the primary par-
tition (Partition0), the Partition0-Erase command must be
used. To unlock the security lock on Page4, the Chip-Erase
command must be used.
8.3 Read Operation Under Lock Condition
The following three cases can be used to indicate the Read
operation is targeting a locked, secured memory area:
1. External host mode: Read-back = 55H (locked)
2. IAP command: Read-back = previous SFDT data
3. MOVC: Read-back = 00H (blank)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SST89E52RC-33-C-PIE | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40 |
| SST89V516RD-33-I-PIE | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40 |
| SST89V516RD-33-C-PI | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40 |
| SST89V516RD-33-I-PIE | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PDIP40 |
| SST89E516RD-40-I-PIE | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST89E52RC-33-C-PIE | 功能描述:8位微控制器 -MCU 8-Bit 8K+1K Flash 33MHz 3/16-Bit Timer RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| SST89E52RD2 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:8 bit 8051-Compatibale Microcontroller (MCU) with Embedded SuperFlash Memory |
| SST89E52RD2/RD | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E52RD2_06 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E52RD2-33-C-NI | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。