參數(shù)資料
型號: SST89E516RD-40-I-PIE
廠商: SILICON STORAGE TECHNOLOGY INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40
封裝: LEAD FREE, PLASTIC, MS-011AC, DIP-40
文件頁數(shù): 72/80頁
文件大?。?/td> 934K
代理商: SST89E516RD-40-I-PIE
74
Data Sheet
FlashFlex51 MCU
SST89E516RD2 / SST89E516RD
SST89V516RD2 / SST89V516RD
2005 Silicon Storage Technology, Inc.
S71273-01-000
3/05
FIGURE
14-7: SHIFT REGISTER MODE TIMING WAVEFORMS
FIGURE
14-8: AC TESTING INPUT/OUTPUT TEST
WAVEFORM
FIGURE
14-9: FLOAT WAVEFORM
TABLE 14-10: SERIAL PORT TIMING
Symbol
Parameter
Oscillator
Units
12MHz
40MHz
Variable
Min
Max
Min
Max
Min
Max
TXLXL
Serial Port Clock Cycle Time
1.0
0.3
12TCLCL
s
TQVXH
Output Data Setup to Clock Rising Edge
700
117
10TCLCL - 133
ns
TXHQX
Output Data Hold After Clock Rising Edge
50
2TCLCL - 117
ns
02TCLCL - 50
ns
TXHDX
Input Data Hold After Clock Rising Edge
0
ns
TXHDV
Clock Rising Edge to Input Data Valid
700
117
10TCLCL - 133
ns
T14-10.0 1273
1273 F36.0
ALE
0
INSTRUCTION
CLOCK
OUTPUT DATA
WRITE TO SBUF
VALID
INPUT DATA
CLEAR RI
01
2
3
4
5
6
7
TXLXL
TQVXH
TXHQX
TXHDV
TXHDX
SET TI
SET R I
1
2
3
4
5
6
7
8
VLT
AC Inputs during testing are driven at VIHT (VDD -0.5V) for Logic "1" and
VILT (0.45V) for a Logic "0". Measurement reference points for inputs and
outputs are at VHT (0.2VDD + 0.9) and VLT (0.2VDD - 0.1)
VHT
VIHT
VILT
1273 F37.0
Note: VHT- VHIGH Test
VLT- VLOW Test
VIHT-VINPUT HIGH Test
VILT- VINPUT LOW Test
For timing purposes, a port pin is no longer floating when a 100 mV
change from load voltage occurs, and begins to float when a 100 mV
change from the loaded VOH/VOL level occurs. IOL/IOH = ± 20mA.
VLOAD +0.1V
VLOAD -0.1V
VOH -0.1V
Timing Reference
Points
VOL +0.1V
VLOAD
1273 F38.0
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