參數(shù)資料
型號(hào)： SST85LP1004A-M-C-LBTE
廠商： SILICON STORAGE TECHNOLOGY INC
元件分類(lèi)： 存儲(chǔ)控制器/管理單元
英文描述： IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91
封裝： 12 X 24 MM, 1.30 MM HEIGHT, ROHS COMPLIANT, MO-210, LBGA-91
文件頁(yè)數(shù)： 30/35頁(yè)
文件大小： 892K
代理商： SST85LP1004A-M-C-LBTE
2009 Silicon Storage Technology, Inc.
S71412-02-000
10/09
4
4 GByte NANDrive
SST85LP1004A
Data Sheet
Multi-tasking Interface
The multi-tasking interface enables fast, sustained write performance by allowing concurrent Read,
Program, and Erase operations to multiple flash media devices.
NAND Flash
The NANDrive family utilize standard NAND Flash for data storage. Because the re-flow process can
alter the NANDrive content, do not program the SST85LP1004A NAND before the reflow process.
Advanced NAND Management Technology
Advanced NAND management technology balances the wear on erased blocks with an advanced
wear-leveling scheme which provides a minimum of 10 million product host write cycles. This manage-
ment technology tracks the number of program/erase cycles within a group. When the host updates
data, higher priority is given to the less frequently written erase blocks; thereby, evenly distributing host
writes within a wear-leveling group.
Advanced NAND management technology enhances NANDrive security with password protection and
four independent protection zones which can be set to Read-only or Hidden.
Functional Blocks
Figure 1: NANDrive Block Diagram
1412 B1.1
HOST
ATA/IDE
BUS
NAND Controller
Multi-tasking
Interf
ace
SCI
NAND
Flash
NANDrive
Embedded
Flash
File System
MCU
ECC
Internal
DMA
SRAM Buffer
PMU
相關(guān)PDF資料
PDF描述
SST85LP1004A-M-C-LBTE IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91
SST85LP1004B-M-C-LFTE IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91
SST89C58-33-I-TQJE 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP44
SST89E516RD-40-C-QIF 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, QCC40
SST89E516RD2-40-C-NJE 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQCC44
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