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參數(shù)資料
| 型號： | SST85LD1008M-60-PC-LBTE |
| 廠商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分類： | 存儲控制器/管理單元 |
| 英文描述： | IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA91 |
| 封裝： | 12 X 24 MM, ROHS COMPLIANT, MO-210, LBGA-91 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 211K |
| 代理商： | SST85LD1008M-60-PC-LBTE |
Fact Sheet
1 GByte / 2 GByte / 4 GByte / 8 GByte NANDrive
SST85LD1001K / SST85LD1002L / SST85LD1004M /SST85LD1008M
2008 Silicon Storage Technology, Inc.
S71319(01)-04-000
11/08
6
IORDY
J4
O
I2Z
IORDY: When Ultra DMA mode DMA Write is not active and the device is not ready to
respond to a data transfer request, this signal is negated to extend the Host transfer
cycle. However, it is never negated by this controller.
DDMARDY#
DDMARDY#: When Ultra DMA mode DMA Write is active, this signal is asserted by the
host to indicate that the device is ready to receive Ultra DMA data-in bursts. The device
may negate DDMARDY# to pause an Ultra DMA transfer.
DSTROBE
DSTROBE: When Ultra DMA mode DMA Read is active, this signal is the data-out
strobe generated by the device. Both the rising and falling edges of DSTROBE cause
data to be latched by the host. The device may stop generating DSTROBE edges to
pause an Ultra DMA data-out burst.
IOCS16#
J8
O
O2
This output signal is asserted low when the device is indicating a word data transfer
cycle.
INTRQ
J2
O
O1
This signal is the active high Interrupt Request to the host.
PDIAG#
K9
I/O
I1U/O1 The Pass Diagnostic signal in the Master/Slave handshake protocol.
DASP#
D9
I/O
I1U/O6 The Drive Active/Slave Present signal in the Master/Slave handshake protocol.
RESET#
E4
I
I2U
This input pin is the active low hardware reset from the host.
Serial Communication Interface (SCI)
SCIDOUT
D8
O
O4
SCI interface data output
SCIDIN
D7
I
I3U
SCI interface data input
SCICLK
E7
I
I3U
SCI interface clock
Miscellaneous
WP#/PD#
F6
I
I3U
The WP#/PD# pin can be used for either the Write Protect mode or Power-down mode,
but only one mode is active at any time. The Write Protect or Power-down modes can
be selected through the host command. The Write Protect mode is the factory default
setting.
VSS
G4, G6, G7,
K4, K6, K7, J9
PWR
Ground
VDD
E9, K5,
L5, M2
PWR
VDD (3.3V)
VDDQ
E2, M9
PWR
VDDQ (5V/3.3V) for Host interface
POR#
J7
I
Analog
Input1
Power-on Reset (POR). Active Low
VREG
D2
O
External capacitor pin
DNU
A1, A2, A9,
A10, B1, B9,
B10, D3, D4,
D5, D6, E5,E6,
F5, G5, L4, L6,
L7, M3, M4,
M5, M6, M7,
M8, N2, N3,
N4, N5, N6,
N7, N8, N9,
R1, R2, R9,
R10, T1, T2,
T9, T10
Do not use.
T3-1.4
1319(01)
1. Analog input for supply voltage detection
TABLE
3-1: Pin Assignments (Continued) (2 of 2)
Symbol
Pin No.
Pin
Type
I/O
Type
Name and Functions
91-LBGA
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| SST85LD1008M-60-PC-LCTE | 功能描述:閃存 8G NAND 60ns 3.3V Industrial RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST85LP1004A-M-C-LBTE | 功能描述:閃存 4GB NANDrive 3.3V RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST85LP1016B-M-C-FTE | 功能描述:閃存 16G NAND 3.3V Commercial RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST88VP1107 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:All-in-OneMemory |
| SST88VP1107-80-5C-LBSE | 功能描述:組合存儲器 NOR/NAND/PSRAM 80MHz 2.7V Commercial RoHS:否 制造商:Microchip Technology 組織:512 K x 16 電源電壓-最大: 電源電壓-最小: 最大工作溫度:+ 85 C 最小工作溫度:- 20 C 封裝 / 箱體:LFBGA-48 封裝:Tray |
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