參數(shù)資料
      型號: SST58SM024-70-C-FSI
      廠商: SILICON STORAGE TECHNOLOGY INC
      元件分類: 存儲控制器/管理單元
      英文描述: ER 16C 16#16 PIN PLUG
      中文描述: FLASH MEMORY DRIVE CONTROLLER, XMA
      文件頁數(shù): 8/40頁
      文件大?。?/td> 377K
      代理商: SST58SM024-70-C-FSI
      8
      Advance Information
      ATA-Disk Module
      SST58SM008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192
      SST58LM008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192
      2001 Silicon Storage Technology, Inc.
      S71193-01-000
      9/01
      519
      For the 40-pin ATA-Disk Module, power can be supplied either through the pin 20 (not present on standard 40-pin
      IDE interface) or through the external power connector provided on the 40-pin ADM. Please see the drawings in
      “Physical Dimensions” on page 36 for information.
      FIGURE
      2-1: P
      IN
      30 C
      ONFIGURATION
      TABLE
      2-3: S
      IGNAL
      D
      ESCRIPTION
      Symbol
      A2 - A0
      D15 - D0
      Type
      1
      I
      I/O
      Pin
      33,34,35
      18,16,14,12,10,
      8,6,4,3,5,7,9,11,
      13,15,17
      37,38
      Name and Functions
      A[2:0] are used to select one of the Task File registers.
      Data bus
      CS1FX#, CS3FX#
      I
      CS1FX# is the chip select for the task file registers while CS3FX# is used to
      select the Alternate Status Register and the Device Control Register.
      CSEL signal is a NC to the motherboard. The Master/Slave selection is set by a
      jumper. If the jumper is in a Master position, the ADM is addressed as a Master
      drive, and if the jumper is in a Slave position, the ADM is addressed as a Slave
      drive.
      This is an I/O Read strobe generated by the host. This signal gates I/O data
      onto the bus from the chip.
      The I/O Write strobe pulse is used to clock I/O data into the chip.
      This output signal is asserted low when this device is expecting a word data
      transfer cycle.
      Signal is the active high Interrupt Request to the host.
      This input/output is the Pass Diagnostic signal in the Master/Slave hand-
      shake protocol.
      This input/output is the Disk Active/Slave present signal in the Master/Slave
      handshake protocol.
      This input pin is the active low hardware reset from the host.
      Ground
      CSEL
      -
      28
      IORD#
      I
      25
      IOWR#
      IOCS16#
      I
      23
      32
      O
      INTRQ
      PDIAG#
      O
      I/O
      31
      34
      DASP#
      I/O
      39
      RESET#
      GND
      I
      -
      1
      2,19,22,24,26,
      30,40,43
      2
      30
      WP#
      3
      I
      Write protect pin is used to disable Write operation. The 3-position jumper can set
      pin 30 as NC, write protected (by connecting to GND), or host selectable (by con-
      necting to pin 30 of IDE connector). When the signal on this pin is low, data on the
      chip will be write-protected. (See Figure 2-1)
      Power
      V
      DD
      -
      20
      4
      , 41
      2
      , 42
      2
      T2-3.6 519
      1. Please refer to Sections 2.3.1 to 2.3.4 for detail
      2. Only available with the 44-pin connector module
      3. Pin 30 is jumper selectable as NC or WP#
      4. Only available with the 40-pin connector module
      519 ILL2-5.1
      ATA Controller
      Flash
      Memory
      2
      3
      1
      Pin 30
      WP# Jumper
      ATA-Disk Module
      WP# Jumper ATA-Disk Module
      No Jumper
      NC, Module is NOT write protected.
      Close 1, 2
      Connect to Ground,
      Module is write protected
      Close 2, 3
      Host Selectable,
      Module is write protected if pin 30 is low.
      Module is NOT write protected if pin 30
      is high.
      T2-3.0 519
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