參數(shù)資料
型號(hào): SST58LM008-70-C-FRI
廠商: SILICON STORAGE TECHNOLOGY INC
元件分類: 存儲(chǔ)控制器/管理單元
英文描述: ATA-Disk Module
中文描述: FLASH MEMORY DRIVE CONTROLLER, XMA
文件頁數(shù): 13/40頁
文件大?。?/td> 377K
代理商: SST58LM008-70-C-FRI
Advance Information
ATA-Disk Module
SST58SM008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192
SST58LM008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192
13
2001 Silicon Storage Technology, Inc.
S71193-01-000
9/01
519
2.3.7 I/O Output (Write) Timing Specification
Note:
All times are in nanoseconds. The maximum load on IOCS16# is 1 LSTTL with 50pF total load.
All AC specifications are guaranteed by design.
FIGURE
2-2: I/O W
RITE
T
IMING
D
IAGRAM
FIGURE
2-3: AC I
NPUT
/O
UTPUT
R
EFERENCE
W
AVEFORMS
TABLE
2-6: I/O W
RITE
T
IMING
Item
Data Setup before IOWR#
Data Hold following IOWR#
IOWR# Width Time
Valid Address Setup before IOWR#
Valid Address Hold following IOWR#
IOCS16# Delay Falling from Address
IOCS16# Delay Rising from Address
Symbol
tsu(IOWR)
th(IOWR)
tw(IOWR)
tsuA(IOWR)
thA(IOWR)
tdfIOCS16(ADR)
tdrIOCS16(ADR)
IEEE Symbol
tDVIWH
tlWHDX
tlWLIWH
tAVIWL
tlWHAX
tAVISL
tAVISH
Min
20
10
70
25
10
-
Max
-
-
-
-
-
20
20
T2-6.4 519
519 ILL2-8.4
tdrIOCS16(ADR)
tdfIOCS16(ADR)
thA(IOWR)
th(IOWR)
tsu(IOWR)
Din Valid
tsuA(IOWR)
tw(IOWR)
Valid Address
1
IORW#
IOCS16#
D15-D0
1. Valid Address consists of signals CS1FX#, CS3FX#, and A2-A0.
519 ILL F11.0
REFERENCE POINTS
OUTPUT
INPUT
VHT
VLT
VHT
VLT
VIHT
VILT
AC test inputs are driven at V
IHT
(2.4V) for a logic “1” and V
ILT
(0.4V) for a logic “0”. Measurement reference points for
inputs and outputs are V
HT
(2.0V) and V
LT
(0.8V). Input rise and fall times (10%
90%) are <10 ns.
Note:
V
HT
- V
HIGH
Test
V
LT
- V
LOW
Test
V
IHT
- V
INPUT
HIGH Test
V
ILT
- V
INPUT
LOW Test
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