參數(shù)資料
型號: SST4860
英文描述: TRANSISTOR | JFET | N-CHANNEL | 20MA I(DSS) | SOT-23
中文描述: 晶體管|場效應(yīng)| N溝道| 20mA的我(直)| SOT - 23封裝
文件頁數(shù): 10/60頁
文件大小: 572K
代理商: SST4860
10
Data Sheet
CompactFlash Card
SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256
2001 Silicon Storage Technology, Inc.
S71125-03-000
9/01
375
-CSEL
(PC Card Memory Mode)
-CSEL
(PC Card I/O Mode)
-CSEL
(True IDE Mode)
I
39
This signal is not used for this mode.
This signal is not used for this mode.
This internally pulled up signal is used to configure this device as a
Master or a Slave when configured in the True IDE Mode. When this
pin is grounded, this device is configured as a Master. When the pin
is open, this device is configured as a Slave.
These lines carry the Data, Commands and Status information
between the host and the controller. D00 is the LSB of the Even Byte
of the Word. D08 is the LSB of the Odd Byte of the Word.
This signal is the same as the PC Card Memory Mode signal.
D15 - D00
(PC Card Memory Mode)
I/O
31,30,29,28,
27,49,48,47,
6,5,4,3,2,
23, 22, 21
D15 - D00
(PC Card I/O Mode)
D15 - D00
(True IDE Mode)
In True IDE Mode, all Task File operations occur in Byte-Mode on the
low order bus D00-D07 while all data transfers are 16 bit using D00-
D15.
Ground.
GND
(PC Card Memory Mode)
GND
(PC Card I/O Mode)
GND
(True IDE Mode)
-INPACK
(PC Card Memory Mode)
-INPACK
(PC Card I/O Mode)
Input Acknowledge
-
1,50
This signal is the same for all modes.
This signal is the same for all modes.
O
43
This signal is not used in this mode.
The Input Acknowledge signal is asserted by the CompactFlash
Card when the card is selected and responding to an I/O read cycle
at the address that is on the address bus. This signal is used by the
host to control the enable of any input data buffers between the Com-
pactFlash card and the CPU.
In True IDE Mode this output signal is not used and should not be
connected at the host.
This signal is not used in this mode.
-INPACK
(True IDE Mode)
-IORD
(PC Card Memory Mode)
-IORD
(PC Card I/O Mode)
I
34
This is an I/O Read strobe generated by the host. This signal gates
I/O data onto the bus from the CompactFlash Card when the card is
configured to use the I/O interface.
In True IDE Mode, this signal has the same function as in PC Card
I/O Mode.
This signal is not used in this mode.
-IORD
(True IDE Mode)
-IOWR
(PC Card Memory Mode)
-IOWR
(PC Card I/O Mode)
I
35
The I/O Write strobe pulse is used to clock I/O data on the Card Data
bus into the CompactFlash card controller registers when the Com-
pactFlash card is configured to use the I/O interface.
The clocking will occur on the negative to positive edge of the signal
(trailing edge). In True IDE Mode, this signal has the same function
as in PC Card I/O Mode.
-IOWR
(True IDE Mode)
TABLE
2-2: S
IGNAL
D
ESCRIPTION
(C
ONTINUED
) (2
OF
4)
Symbol
Type
1
Pin
Name and Functions
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