參數(shù)資料
型號: SST34HF3243B-90-4C-LP
英文描述: PSOC USB IN-SYSTEM PROGRAMMER
中文描述: 混合存儲器|靜態(tài)存儲器EEPROM中|的CMOS | BGA封裝| 56PIN |塑料
文件頁數(shù): 15/32頁
文件大小: 486K
代理商: SST34HF3243B-90-4C-LP
Data Sheet
16 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory
SST34HF1621 / SST34HF1641
15
2001 Silicon Storage Technology, Inc.
S71172-05-000
10/01 523
TABLE 14: F
LASH
R
EAD
C
YCLE
T
IMING
P
ARAMETERS
V
DD
= 2.7-3.3V
Symbol
T
RC
T
CE
T
AA
T
OE
T
CLZ1
T
OLZ1
T
CHZ1
T
OHZ1
T
OH1
T
RP1
T
RHR1
T
RY1,2
Parameter
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
BEF# Low to Active Output
OE# Low to Active Output
BEF# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
RST# Pulse Width
RST# High Before Read
RST# Pin Low to Read
SST34HF1621/1641-70
Min
70
SST34HF1621/1641-90
Min
90
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
Max
Max
70
70
35
90
90
45
0
0
0
0
20
20
30
30
0
0
500
50
500
50
150
150
T14.4 523
1. This parameter is measured only for initial qualification and after the design or process change that could affect this parameter.
2. This parameter applies to Sector-Erase and Block-Erase operations. This parameter does not apply to Chip-Erase operations.
TABLE 15: F
LASH
P
ROGRAM
/E
RASE
C
YCLE
T
IMING
P
ARAMETERS
Symbol
T
BP
T
AS
T
AH
T
CS
T
CH
T
OES
T
OEH
T
CP
T
WP
T
WPH1
T
CPH1
T
DS
T
DH1
T
IDA1
T
BY1
T
BR
T
SE
T
BE
T
SCE
Parameter
Word-Program Time
Address Setup Time
Address Hold Time
WE# and BEF# Setup Time
WE# and BEF# Hold Time
OE# High Setup Time
OE# High Hold Time
BEF# Pulse Width
WE# Pulse Width
WE# Pulse Width High
BEF# Pulse Width High
Data Setup Time
Data Hold Time
Software ID Access and Exit Time
RY/BY# Delay Time
Bus Recovery Time
Sector-Erase
Block-Erase
Chip-Erase
Min
Max
20
Units
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ms
ms
ms
0
40
0
0
0
10
40
40
30
30
30
0
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
150
90
1
25
25
100
T15.3 523
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