參數(shù)資料
型號: SST34HF1621
廠商: Silicon Storage Technology, Inc.
元件分類: 組合存儲器
英文描述: 16 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory
中文描述: 16兆位并行快閃2 / 4兆位的SRAM ComboMemory
文件頁數(shù): 16/32頁
文件大?。?/td> 486K
代理商: SST34HF1621
16
Data Sheet
16 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory
SST34HF1621 / SST34HF1641
2001 Silicon Storage Technology, Inc.
S71172-05-000
10/01 523
FIGURE 3: SRAM R
EAD
C
YCLE
T
IMING
D
IAGRAM
FIGURE 4: SRAM W
RITE
C
YCLE
T
IMING
D
IAGRAM
(WE# C
ONTROLLED
)
1
ADDRESSES AMSS-0
DQ15-0
UBS#, LBS#
AMSS = Most Significant SRAM Address
OE#
BES1#
BES2
TRCS
TAAS
TBES
TOES
TBLZS
TOLZS
TBYES
TBYLZS
TBYHZS
DATA VALID
TOHZS
TBHZS
TOHS
523 ILL F15.0
TBES
TAWS
ADDRESSES AMSS-0
BES1#
BES2
WE#
UBS#, LBS#
Notes: 1. If OE# is High during the Write cycle, the outputs will remain at high impedance.
2. If BES1# goes Low or BES2 goes high coincident with or after WE# goes Low,
the output will remain at high impedance.
If BES1# goes High or BES2 goes low coincident with or before WE# goes High,
the output will remain at high impedance.
Because DIN signals may be in the output state at this time, input signals of reverse
polarity must not be applied.
TWPS
TWRS
TWCS
TASTS
TBWS
TBWS
TBYWS
TODWS
TOEWS
TDHS
TDSS
523 ILL F16.2
NOTE 2
NOTE 2
DQ15-8, DQ7-0
VALID DATA IN
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