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參數(shù)資料
| 型號(hào)： | SST34HF1602D-70-4C-B1SE |
| 廠商： | Silicon Storage Technology, Inc. |
| 元件分類： | 組合存儲(chǔ)器 |
| 英文描述： | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| 中文描述： | 16兆兆位并行的SuperFlash 2/4/8 SRAM的ComboMemory |
| 文件頁(yè)數(shù)： | 11/38頁(yè) |
| 文件大?。?/td> | 488K |
| 代理商： | SST34HF1602D-70-4C-B1SE |
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Advance Information
16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory
SST34HF1602C / SST34HF1622C / SST34HF1642C
SST34HF1642D / SST34HF1682D / SST34HF1622S / SST34HF1642S
11
2004 Silicon Storage Technology, Inc.
S71256-00-000
3/04
TABLE
3: P
IN
D
ESCRIPTION
Symbol
A
MS1
to A
0
Address Inputs
Pin Name
Functions
To provide flash address, A
19
-A
0
.
To provide (P)SRAM address, A
MS
-A
0
To provide additional address for x8 SRAM
To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a flash Erase/Program cycle. The outputs are in
tri-state when OE# is high or BES1# is high or BES2 is low and BEF# is high.
DQ
15
is used as data I/O pin when in x16 mode (CIOF = “1”)
A
-1
is used as the LBS address pin when in x8 mode (CIOF = “0”)
To activate the Flash memory bank when BEF# is low
(P)SRAM Memory Bank Enable To activate the (P)SRAM memory bank when BES1# is low
(P)SRAM Memory Bank Enable To activate the (P)SRAM memory bank when BES2 is high
Output Enable
To gate the data output buffers for Flash
2
only
Output Enable
To gate the data output buffers for SRAM
2
only
Write Enable
To control the Write operations for Flash
2
only
Write Enable
To control the Write operations for SRAM
2
only
Output Enable
To gate the data output buffers
Write Enable
To control the Write operations
Byte Selection for Flash
When low, select Byte mode. When high, select Word mode.
Upper Byte Control ((P)SRAM)
To enable DQ
15
-DQ
8
Lower Byte Control ((P)SRAM)
To enable DQ
7
-DQ
0
Write Protect
To protect and unprotect the top 8 KWord (4 sectors) from Erase or Program
operation
Reset
To Reset and return the device to Read mode
Ready/Busy#
To output the status of a Program or Erase Operation
RY/BY# is a open drain output, so a 10K
- 100K
pull-up resistor is required to
allow RY/BY# to transition high indicating the device is ready to read.
Ground
Flash
2
only
Ground
SRAM
2
only
Ground
Power Supply (Flash)
2.7-3.3V Power Supply to Flash only
Power Supply ((P)SRAM)
2.7-3.3V Power Supply to (P)SRAM only
No Connection
Unconnected pins
SA
DQ
14
-DQ
0
Data Inputs/Outputs
SRAM x8 Address
DQ
15
/A
-1
Data Input/Output
and LBS Address
Flash Memory Bank Enable
BEF#
BES1#
BES2
OEF#
2
OES#
2
WEF#
2
WES#
2
OE#
WE#
CIOF
UBS#
LBS#
WP#
RST#
RY/BY#
V
SSF2
V
SSS2
V
SS
V
DD
F
V
DD
S
NC
T3.0 1256
1. A
MS
= Most Significant Address
A
MS
= A
16
for SST34HF1622C/S, A
17
for SST34HF1642C/D/S, and A
18
for SST34HF1682D
2. LS package only
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SST34HF1602D-70-4C-L1PE | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4C-L1SE | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4C-LPE | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1622D-70-4C-L1PE | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1682D-70-4C-L1PE | 16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST34HF1602D-70-4C-L1PE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4C-L1SE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4C-LPE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4C-LSE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
| SST34HF1602D-70-4E-B1PE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:16 Mbit Concurrent SuperFlash + 2/4/8 Mbit SRAM ComboMemory |
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