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參數(shù)資料
| 型號： | SSP-21116-015-883B |
| 英文描述： | Power Control/Management |
| 中文描述： | 電源控制/管理 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 80K |
| 代理商： | SSP-21116-015-883B |
LOADS
The SSP-21120 series can be used with any type of load: any
combination of inductive, resistive, and capacitive. In addition,
they can be used with dc motors and lamps.
Inductive loads require protecting the SSPC against voltage tran-
sients. See the section on Precautions on page 5.
Capacitive loads require comparing the load in-rush current to
the trip curve of FIGURE 2. The in-rush current must be below
the minimum trip curve to avoid tripping on the in-rush current.
Capacitive loads can present a discharge problem. The SSPCs
use Power MOSFETs as the switching element. The MOSFETs
contain a parasitic diode which will be forward biased if the
SSPC power output terminal is more positive than the power
input terminal. If the 28 Vdc source is turned off while a charge
is held on the capacitive load, this diode will turn on and dis-
charge the load through the generator. The SSPC can carry a
reverse current equal to its forward current rating; however, the
dissipation with reverse current is up to seven times the forward
current dissipation for the same current. The user must ensure
that the maximum case temperature is not exceeded.
Incandescent lamps must be treated like capacitive loads for in-
rush current. Since they do not store charge, they do not present
a discharge problem.
DC motors also must be treated like capacitive loads for in-rush
current.If they continue rotating when power is removed, reverse
current is a possibility due to back EMF. Voltage transients must
also be considered when using dc motors as loads on SSPCs.
HEATSINKING
The SSP-21120 series are designed so that the junction tem-
perature can never exceed its maximum rating if the case tem-
perature is held to 85
°
C or less. Heatsinking is recommended to
keep the case temperature to 85
°
C when operating at high ambi-
ent temperatures. The SSPCs may be operated at room tem-
perature without a heat sink. The maximum ambient tempera-
ture, T
A
, for operation without a heat sink is 85 - P
d
x
θ
CA
(where
P
d
is the power dissipation from TABLE 4 and
θ
CA
is the thermal
resistance from case-to-ambient from TABLE 3).
The same expression is used for finding the maximum ambient
temperature with a heat sink except
θ
CA
is now the sum of the
thermal resistance from case-to-sink and from sink-to-ambient.
NO OFFSET VOLTAGE
The Power MOSFET used in the DDC SSPCs have no inherent
voltage offset. The voltage drop across the Power MOSFET is
solely dependant on the current flowing through the device and
its "ON" resistance.
Bipolar transistors, on the other hand, have an inherent dc offset
voltage to which is added a voltage drop proportional to the
devices' "ON" resistance and the current flowing through it. It is
this inherent offset voltage that is missing from the power MOS-
FET. The Power MOSFET in many applications, leads to lower
voltage drop and power dissipation as an SSPC switch. In addi-
tion the Power MOSFETs driver logic requirements are much
simplier, especially when multiple MOSFETs are used, as in the
SSPC product.
NO SECONDARY BREAKDOWN, AND PARALLELING
SSPCS
A bipolar transistor has a set of current-voltage limits that form
an envelope that cannot be exceeded; this is known as the safe
operating area of the device. If this envelope is exceeded local
hot spots will occur. These hot spots conduct currents more
readily then adjacent cool areas and tend to become hotter.This
thermal runaway leads to the ultimate destruction of the device;
this is called secondary breakdown.
The Power MOSFETs have the opposite characteristics from
that of thermal runaway in bipolar devices. A local hot-spot will
steer current away from itself as its resistance in this area goes
up. This results in even current sharing throughout the entire
device, thereby eliminating hot-spots.The inherent advantage of
not having secondary breakdown is that the entire MOSFET has
to exceed its temperature limitations before damage results.This
characteristic makes the Power MOSFET more rugged when
used for power switching then bipolar devices.
Due to the current sharing aspects of the power MOSFET, they
can be placed in parallel and share the load equally.
ISOLATION OF CONTROL AND STATUS
The SSPC was designed with isolation between the load power
and the 5 volt control logic input and the status outputs. This is
necessary to prevent noise caused by transients or power spikes
on the power line from adversely affecting the operation of the
SSPC. Therefore the case, POWER IN, and Control Circuit are
all electrically isolated. FIGURE 1, SSPC BLOCK DIAGRAM,
shows this isolation as the "ISOLATED CONTROL CIRCUIT";
also notice the separation of the power (neutral) ground and sig-
nal (bias supply common) ground.
The electrical isolation is supported by an internal power oscilla-
tor that electrically isolates separate internal power supplies that
will power the internal analog and digital monolithics. This isola-
tion prevents load or logic ground loops from affecting the prop-
er operation of the SSPC. The isolation also insures that a fault
of the switch (MOSFET) could never propagate back into the
SSPC logic or cause damage to the logic side.
OPTIONS
The following characteristics can be factory modified on special
orders:
I
2
T TRIP CURVE: K-factor adjustments
OUTPUT RISE AND FALL TIMES: Turn-Off and Turn-On time
can be factory modified (e.g., capacitive loads).
CURRENT RANGE
CUSTOM PACKAGING
6
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