參數(shù)資料
型號(hào): SSM2603CPZ-REEL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 5/32頁(yè)
文件大?。?/td> 0K
描述: IC CODEC AUDIO LOW POWER 28LFCSP
標(biāo)準(zhǔn)包裝: 5,000
類型: 立體聲音頻
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變: 無(wú)
S/N 比,標(biāo)準(zhǔn) ADC / DAC (db): 90 / 100
電壓 - 電源,模擬: 1.8 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.5 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-VFQFN 裸露焊盤(pán),CSP
供應(yīng)商設(shè)備封裝: 28-LFCSP-VQ
包裝: 帶卷 (TR)
Data Sheet
SSM2603
Rev. C | Page 13 of 32
ANALOG INTERFACE
Signal Chain
The SSM2603 includes stereo single-ended line and monaural
microphone inputs to the on-board ADC. Either the line inputs
or the microphone input, but not both simultaneously, can be
connected to the ADC by setting the INSEL bit (Register R4,
Bit D2). In addition, the line or microphone inputs can be routed
and mixed directly to the output terminals via the SIDETONE_EN
(Register R4, Bit D5) and BYPASS (Register R4, Bit D3) bits.
The SSM2603 also includes line and headphone outputs from
the on-board DAC.
Stereo Line and Monaural Microphone Inputs
The SSM2603 contains a set of single-ended stereo line inputs
(RLINEIN and LLINEIN) that are internally biased to VMID
by a voltage divider placed between AVDD and AGND. The
line input signal can be connected to the internal ADC and, if
desired, routed directly to the outputs via the bypass path by
using the bypass bit (Register R4, Bit D3).
Figure 19. Line Input to ADC
The line input volume can be adjusted from 34.5 dB to +33 dB
in steps of +1.5 dB by setting the LINVOL (Register R0, Bit D0 to
Bit D5) and RINVOL (Register R1, Bit D0 to Bit D5) bits. Volume
control, by default, is independently adjustable on both right and
left line inputs. However, the LRINBOTH or RLINBOTH bit, if
selected, simultaneously loads both sets of volume control with
the same value. The user can also set the LINMUTE (Register R0,
Bit D7) and RINMUTE (Register R1, Bit D7) bits to mute the line
input signal to the ADC.
The high impedance, low capacitance monaural microphone
input pin (MICIN) has two gain stages and a microphone bias
level (MICBIAS) that is internally biased to the VMID voltage
level by a voltage divider placed between AVDD and AGND.
The microphone input signal can be connected to the internal
ADC and, if desired, routed directly to the outputs via the sidetone
path by using the SIDETONE_EN bit (Register R4, Bit D5).
Figure 20. Microphone Input to ADC
The first gain stage is composed of a low noise operational
amplifier set to an inverting configuration with integrated
50 k feedback and 10 k input resistors. The default
microphone input signal gain is 14 dB. An external resistor
(REXT) can be connected in series with the MICIN pin to reduce
the first-stage gain of the microphone input signal to as low as
0 dB by using the following equation:
Microphone Input Gain = 50 k/(10 k + REXT)
The second-stage gain of the microphone signal path is derived
from the internal microphone boost circuitry. The available
settings are 0 dB and 20 dB and are controlled by the MICBOOST
(Register R4, Bit D0) bit. To achieve 20 dB of secondary gain
boost, the user can select MICBOOST
In similar functionality to the line inputs, the MUTEMIC bit
(Register R4, Bit D1) can be set to mute the microphone input
signal to the ADC.
Note that when sourcing audio data from both line and
microphone inputs, the maximum full-scale input of the ADC
is 1.0 V rms when AVDD = 3.3 V. Do not source any input
voltage larger than full scale to avoid overloading the ADC,
which causes distortion of sound and deterioration of audio
quality. For best sound quality in both microphone and line
inputs, gain should be carefully configured so that the ADC
receives a signal equal to its full scale. This maximizes the
signal-to-noise ratio for best total audio quality.
07241-
031
ADC
OR
BYPASS
LINEIN
AVDD
VMID
AGND
+
07241-
032
ADC
OR
SIDETONE
INTERNAL CIRCUITRY
MICIN
AVDD
VMID
AGND
REXT
GAIN =
50k
(REXT + 10k)
10k
50k
0dB/20dB
GAIN BOOST
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