參數(shù)資料
型號: SSM2317CBZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 7/20頁
文件大?。?/td> 0K
描述: IC AMP AUDIO 3.89W MONO D 9WLCSP
產(chǎn)品變化通告: 8mm Carrier Tape Changes 28/Feb/2012
標準包裝: 1
類型: D 類
輸出類型: 1-通道(單聲道)
在某負載時最大輸出功率 x 通道數(shù)量: 3.89W x 1 @ 3 歐姆
電源電壓: 2.5 V ~ 5.5 V
特點: 消除爆音,差分輸入,短路和熱保護,關閉
安裝類型: 表面貼裝
供應商設備封裝: 9-WLCSP(1.52 x 1.69)
封裝/外殼: 9-UFBGA,WLCSP
包裝: 標準包裝
產(chǎn)品目錄頁面: 764 (CN2011-ZH PDF)
配用: SSM2317-MINI-EVALZ-ND - BOARD EVAL MINI SSM2317
SSM2317-EVALZ-ND - BOARD EVAL SSM2317
其它名稱: SSM2317CBZ-REEL7DKR
SSM2317
Rev. A | Page 15 of 20
compared with double-sided boards. A multilayer board allows
a complete layer to be used for the ground plane, whereas the
ground plane side of a double-sided board is often disrupted with
signal crossover.
If the system has separate analog and digital ground and power
planes, place the analog ground plane underneath the analog power
plane, and, similarly, place the digital ground plane underneath the
digital power plane. There should be no overlap between analog
and digital ground planes or analog and digital power planes.
INPUT CAPACITOR SELECTION
The SSM2317 does not require input coupling capacitors if
the input signal is biased from 1.0 V to VDD 1.0 V. Input
capacitors are required if the input signal is not biased within
this recommended input dc common-mode voltage range, if
high-pass filtering is needed, or if a single-ended source is used.
If high-pass filtering is needed at the input, the input capacitor
and the input resistor of the SSM2317 form a high-pass filter
whose corner frequency is determined by the following
equation:
fC = 1/{2π × (10 kΩ + REXT) × CIN}
The input capacitor can significantly affect the performance of
the circuit. Not using input capacitors degrades both the output
offset of the amplifier and the dc PSRR performance.
PROPER POWER SUPPLY DECOUPLING
To ensure high efficiency, low total harmonic distortion (THD),
and high PSRR, proper power supply decoupling is necessary.
Noise transients on the power supply lines are short-duration
voltage spikes. Although the actual switching frequency can
range from 10 kHz to 100 kHz, these spikes can contain frequency
components that extend into the hundreds of megahertz. The
power supply input needs to be decoupled with a good quality
low ESL, low ESR capacitor, usually of around 4.7 μF. This
capacitor bypasses low frequency noises to the ground plane.
For high frequency transient noises, use a 0.1 μF capacitor as
close as possible to the VDD pin of the device. Placing the
decoupling capacitor as close as possible to the SSM2317 helps
maintain efficient performance.
AUTOMATIC LEVEL CONTROL (ALC)
Automatic level control (ALC) is a function that automatically
adjusts amplifier gain to generate desired output amplitude with
reference to a particular input stimulus. The primary motivation
for the use of ALC is to protect an audio power amplifier or
speaker load from the damaging effects of clipping or current
overloading. This is accomplished by limiting the amplifier’s
output amplitude upon reaching a preset threshold voltage. A
less intuitive benefit of ALC is that it makes sound sources with
a wide dynamic range more intelligible by boosting low level
signals yet limits very high level signals.
Figure 42 shows input vs. output and gain characteristics of
ALC that is implemented in the SSM2317.
24
21
18
15
12
9
6
3
0
12
9
6
3
0
–3
–6
–9
–12
–30
–20
–10
0
10
INPUT (dBV)
GA
IN
(
d
B
)
OU
T
P
U
T
(
d
B
V
)
07
24
2-
04
2
GAIN
OUTPUT
Figure 42. Input/Output Characteristic and Gain
When the input level is small and below the ALC threshold
value, the gain of the amplifier stays at 18 dB. When the input
exceeds the ALC threshold value, the ALC begins to gradually
reduce the gain from 18 dB to 3.5 dB.
OPERATING MODES
The ALC implemented on SSM2317 has two operating modes:
compression and limiting. At the time the ALC is triggered for
medium level input, the ALC is in compression mode. In this
mode, an increase of the output signal is 1/3 of the increase of
the input signal. For example, if the input signal increases by
3 dB, the ALC reduces the amplifier gain by 2 dB and thus the
output signal only increases by 1 dB.
As the input signal becomes very large, the ALC transitions into
limiting operation mode. In this mode, the output stays at a
given threshold level, VTH, even if the input signal grows larger.
For example, when a large input signal increases by 3 dB, the
ALC reduces the amplifier gain by 3 dB and thus the output
increases 0 dB. When the amplifier gain is reduced to 3.5 dB,
ALC cannot further reduce the gain and the output increases
again. To avoid potential speaker damage, the maximum input
signal should not be large enough to exceed the maximum
attenuation (3.5 dB) of the limiting operational mode.
ATTACK TIME, HOLD TIME, AND RELEASE TIME
When the amplifier input exceeds a preset threshold, ALC
reduces amplifier gain rapidly until its output settles to a target
level. This gain level is maintained for a certain period. If the
input does not exceed the threshold again, ALC increases the
gain gradually. The attack time is the time taken to reduce the
gain from maximum to minimum. The hold time is the time to
sustain the reduced gain. The release time is the time taken to
increase the gain from minimum to maximum. These times are
shown in Table 5.
Table 5. Attack, Hold, and Release Times
Time
Duration (ms)
Attack Time
0.1
Hold Time
35
Release Time
550
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