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參數(shù)資料
| 型號： | SPT7950SIR |
| 廠商： | SIGNAL PROCESSING TECHNOLOGIES |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 39K |
| 代理商： | SPT7950SIR |
Signal Processing Technologies, Inc.
4755 Forge Road, Colorado Springs, Colorado 80907, USA
Phone: 719-528-2300
Fax: 719-528-2370
Web Site: http://www.spt.com
e-mail: sales@spt.com
SPT7950
12-BIT, 100 MSPS A/D CONVERTER
ADVANCE INFORMATION
APPLICATIONS
All high-speed applications where low power
dissipation is required
Video imaging
Medical imaging
Radar receivers
IR imaging
Digital communications
FEATURES
Target sample rate: 100 MSPS at 550 mW
11 effective number of bits (ENOBs) at
IN
= 10 MHz
and
S
= 100 MSPS
Full-scale input range = 2 V
P-P
Differential input
2.5 V common mode
Internal voltage reference
+3.3 V / +5 V digital output logic compatibility
Common-mode reference output
+5 V analog power supply
GENERAL DESCRIPTION
The SPT7950 is a 12-bit, 100 MSPS analog-to-digital con-
verter with low power dissipation at only 550 mW typical
at 100 MSPS with a power supply of +5.0 V. The digital
outputs are +3 V or +5 V, and are user selectable. The
SPT7950 has incorporated proprietary circuit design and
CMOS processing technologies to achieve its advanced
performance. Inputs and outputs are TTL/CMOS compat-
ible to interface with TTL/CMOS logic systems. Output
data format is straight binary.
The SPT7950 is available in a 28-lead SSOP package
over the industrial temperature range.
BLOCK DIAGRAM
V
CM
V
DD
GND
THA
V
IN
V
IN
Data
Output
Latches
& Buffers
12
12
D0 D11
GND
OV
DD
Voltage
Reference
2
CLK, CLK
REF
H
REF
L
EXT/INT
12-BIT
100 MSPS
ADC
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