- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄225224 > SPT7868SIR (SIGNAL PROCESSING TECHNOLOGIES) 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 PDF資料下載
參數(shù)資料
| 型號： | SPT7868SIR |
| 廠商： | SIGNAL PROCESSING TECHNOLOGIES |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | SSOP-28 |
| 文件頁數(shù)： | 5/5頁 |
| 文件大?。?/td> | 40K |
| 代理商： | SPT7868SIR |
SPT
5
8/15/00
SPT7868
Signal Processing Technologies, Inc. reserves the right to change products and specifications without notice. Permission is
hereby expressly granted to copy this literature for informational purposes only. Copying this material for any other use is strictly
prohibited.
WARNING – LIFE SUPPORT APPLICATIONS POLICY – SPT products should not be used within Life Support Systems without
the specific written consent of SPT. A Life Support System is a product or system intended to support or sustain life which, if it
fails, can be reasonably expected to result in significant personal injury or death.
Signal Processing Technologies believes that ultrasonic cleaning of its products may damage the wire bonding, leading to device
failure. It is therefore not recommended, and exposure of a device to such a process will void the product warranty.
ORDERING INFORMATION
PART NUMBER
TEMPERATURE RANGE
PACKAGE TYPE
SPT7868SIR
–40 to +85 °C
28L SSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
VDD
REFL
REFH
VCM
GND
VDD
VIN
CLK
D0
D1
D2
D3
D4
OGND
OVDD
OGND
OVDD
D5
D6
D7
D8
D9 (MSB)
EXT/INT
VIN
SPT7868
28L SSOP
CLK
OR
Sleep
PIN ASSIGNMENTS
PIN FUNCTIONS
Name Function
GND
Analog ground
VDD
Analog +5 V
OGND
Output ground
OVDD
Supply voltage for digital outputs +5 V or
+3.3 V
REFL
Reference pin low, input for external
reference, bypass with capacitor (100 nF)
when internal reference is selected.
REFH
Reference pin high, input for external
reference, bypass with capacitor (100 nF)
when internal voltage is selected.
VCM
2.5 V common mode voltage reference output
VIN
Non-inverted analog input
VIN
Inverted analog input
CLK
Clock input pin
CLK
Complement of clock input pin, internally
biased to 1.5 V; if single-ended clock is used,
bypass to GND with 100 nF
D0–D9
Digital outputs; D0 = LSB; 3.3 V/5 V
compatible
OR
Overrange bit; 3.3 V/5 V compatible
EXT/INT
EXT/INT = 1, external reference used; internal
reference powered down
EXT/INT = 0, internal reference used;
internally pulled down
Sleep
Sleep = 1, normal operation; internally pulled
up
Sleep = 0, powered-down mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SPT7870SIJ | 1-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP32 |
| SPT7912SCU | 1-CH 12-BIT FLASH/SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, UUC32 |
| SPT7912SCJ | 1-CH 12-BIT FLASH/SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP32 |
| SPT7912SCJ | 1-CH 12-BIT FLASH/SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP32 |
| SPT7935SCT | 1-CH 12-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PQFP44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPT7870 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-BIT, 100 MSPS ECL A/D CONVERTER |
| SPT7870SCU | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-BIT, 100 MSPS ECL A/D CONVERTER |
| SPT7870SIQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-BIT, 100 MSPS ECL A/D CONVERTER |
| SPT7871 | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:10-BIT, 100 MSPS TTL A/D CONVERTER |
| SPT7871SCU | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:10-BIT, 100 MSPS TTL A/D CONVERTER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。