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參數(shù)資料
| 型號： | SPT7862SIT |
| 廠商： | SIGNAL PROCESSING TECHNOLOGIES |
| 元件分類： | ADC |
| 英文描述： | DUAL 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQFP64 |
| 封裝： | TQFP-64 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大小： | 101K |
| 代理商： | SPT7862SIT |
SPT
6
2/23/00
SPT7862
TYPICAL INTERFACE CIRCUIT
Very few external components are required to achieve the
stated device performance. Figure 2 shows the typical inter-
face requirements when using the SPT7862 in normal
circuit operation. The following sections provide descrip-
tions of the major functions and outline critical performance
criteria to consider for achieving the optimal device
performance.
POWER SUPPLIES AND GROUNDING
SPT suggests that both the digital and the analog supply
voltages on the SPT7862 be derived from a single analog
supply as shown in figure 2. A separate digital supply should
be used for all interface circuitry. SPT suggests using this
power supply configuration to prevent a possible latch-up
condition on power up.
OPERATING DESCRIPTION
The general architecture for the dual CMOS ADC is shown
in the block diagram. Each ADC design contains 16 identi-
cal successive approximation (SAR) ADC sections (all oper-
ating in parallel), a 16-phase clock generator, an 11-bit 16:1
digital output multiplexer, correction logic, and a voltage ref-
erence generator which provides common reference levels
for each ADC section.
The high sample rate is achieved by using multiple SAR
ADC sections in parallel, each of which samples the input
signal in sequence. Each SAR ADC uses 16 clock cycles to
complete a conversion. The clock cycles are allocated as
follows:
Table II – Clock Cycles
Clock
Operation
1
Reference zero sampling
2
Auto-zero comparison
3
Auto-calibrate comparison
4
Input sample
5–15
11-bit SAR conversion
16
Data transfer
The 16-phase clock, which is derived from the input clock,
synchronizes these events. The timing signals for adjacent
SAR ADC sections are shifted by one clock cycle so that the
analog input is sampled on every cycle of the input clock by
exactly one SAR ADC section. After 16 clock periods, the
timing cycle repeats. The latency from analog input sample
to the corresponding digital output is 12 clock cycles.
DVDD
OVDDA
Interface
Logic
+D5V
+A5
+
+A5
+
10
F
+D5
Interface
Logic
+D5V
+3V/5V
10
DA9–0
OGNDA
DAVA
OVDDB
DB9–0
OGNDB
DAVB
EN
Enable/Tri-State
(Enable = Active Low)
AVDD
FB
CLKB
ClockINB
+5V
Analog
+5V
Analog
Return
VRHFA
VRHSA
VRLSA
VRLFA
VINA
VINRA
VCAL
CLKA
VRHFB
VRHSB
VRLSB
VRLFB
VINB
VINRB
VINA
ClockINA
Ref In (+4V)
AGND
DGND*
SPT7862
*To reduce the possibility of latch-up, avoid connecting
the DGND pins of the ADC to the digital ground of the system.
NOTES: 1. FB is a 10
H inductor or ferrite bead. It is
to be located as close to the device as possible.
2. All capacitors are 0.1
F surface-mount, unless
otherwise specified.
Ref In (+4V)
+5V
Digital
+5V
Digital
Return
10
F
VINB
Figure 2 – Typical Interface Circuit
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPT7863 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:10-BIT, 40 MSPS, 160 mW A/D CONVERTER |
| SPT7863SCS | 功能描述:直流/直流開關(guān)轉(zhuǎn)換器 10BIT 40MSPS SaR aDC RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關(guān)頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT |
| SPT7863SCSX | 功能描述:直流/直流開關(guān)轉(zhuǎn)換器 RoHS:否 制造商:STMicroelectronics 最大輸入電壓:4.5 V 開關(guān)頻率:1.5 MHz 輸出電壓:4.6 V 輸出電流:250 mA 輸出端數(shù)量:2 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT |
| SPT7863SCT | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 10BIT 40MSPS SaR aDC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| SPT7863SCT_Q | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10BIT 40MSPS SaR aDC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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