![](http://datasheet.mmic.net.cn/300000/SPMC802B_datasheet_16216016/SPMC802B_7.png)
SPMC802B
5. FUNCTIONAL DESCRPITIONS
SPMC802B is an OTP for SPMC02A emulating. The functional
blocks have two kinds of control input. The first one is
configurable option. The other is programmable register.
Configurable options are used as permanent assignment. They
are configured with the program code in the same time. Once
the configurable options are written to SPMC802B, they are
unchangeable as the program code. The configurable options
are described in detail later. Programmable registers are used to
control the functional blocks by the program. The program can
access the registers to achieve the desire functions.
There are two kinds of registers with different access methods.
The first kind of registers uses direct access as normal. The
second kind of registers uses indexed write access for specific
function. They are summarized as following. All of the function
registers will be set to 0 (except
rt1
and
rt0
in
TCS1
), when a reset
signal occurred. The bits
rt1
and
rt0
will be set to 1 when a reset
signal occurred.
5.1. Port A Group
The I/O port A has 8 programmable I/Os that are controlled by
data register PA, direction control register DPA, and pull-up/down
resistance control register RPA. DPA is used to control the pad
I/O attribute. Setting the bit(s) to '1' will enforce the
corresponding pad(s) to output mode. It is a write-only register.
PA is used to store the data contents for output. Reading PA will
get the stored data when corresponding bit of DPA is set as output
mode, or will get the pad status if it is in input mode.
There is a built-in Pull-Up/Down resistor on each pad. PA7:6
have pull-up resistors that is permanent in SPMC802B. PA5:4
can be configured with pull-up or pull-down resistors. These
configurable pull-up/down resistors should be selected or enabled
by configurable option first, and then can be controlled by users'
program through RPA.
The output mode on PA7:6 can be programmed as slow transition
outputs. Programming the bit
slowe
in RPA to '1' will enforce the
output high to low transition time to 250ns
±
20% with 500pf pad
loading at 2.0MHz CPU frequency.
PA7 and PA3:0 are used as external interrupt inputs. The more
details are described in section Interrupt. PA5:4 are used as
voltage compare inputs for Comparator function. They are
analog inputs to provide source voltage inputs. The more details
are described in section Comparator.
The corresponding pads are assigned for SPMC802B as following: (VDD = 5.0V)
PIN
Rp
IN
OUT
Special Function
PA7
5K Up Always
Schmitt-Trigger
-/8mA
IRQ1 interrupt input
PA6
5K Up Always
Schmitt-Trigger
-/8mA
PA5
100K Up/Down@rpa5
8/8mA
CMP1 compare input
PA4
100K Up/Down@rpa4
8/8mA
CMP0 compare input
PA3
100K Up/Down@rpa3
8/8mA
IRQ0 interrupt input
PA2
100K Up/Down@rpa2
8/8mA
IRQ0 interrupt input
PA1
100K Up/Down@rpa1
8/8mA
IRQ0 interrupt input
PA0
100K Up/Down@rpa0
8/8mA
IRQ0 interrupt input
5.2. Port B Group
The I/O port B has 8 programmable I/Os that are controlled by
data register PB, direction control register DPB, and pull-up/down
resistance control register RPB. DPB is used to control the pad
I/O attribute. Setting the bit(s) to '1' will enforce the
corresponding pad(s) to output mode. It is a write-only register.
PB is used to store the data contents for output. Reading PB will
get the stored data when corresponding bit of DPB is set as output
mode, or will get the pad status if it is in input mode.
There is a built-in Pull-Up/Down resistor on each pad except PB5.
PB7, PB6, PB3, and PB0 can be configured with pull-up or
pull-down resistors. These configurable pull-up/down resistors
should be selected by configurable option first, and then can be
controlled by users' program through RPB. PB5 does not have
the internal resistor. For interrupt input on PB5, an external
pull-up resistor is needed to maintain the interrupt function. PB4,
PB2, and PB1 have pull-up resistors. They can be controlled by
users' program through RPB.
Sunplus Technology Co., Ltd.
Proprietary & Confidential
7
AUG. 07, 2002
Version: 1.0