參數(shù)資料
型號(hào)： SPC5534MVZ80
廠商： Freescale Semiconductor
文件頁數(shù)： 20/54頁
文件大?。?/td> 0K
描述： MCU POWERPC 1M FLASH 324-PBGAPGE
標(biāo)準(zhǔn)包裝： 60
系列： MPC55xx Qorivva
核心處理器： e200z6
芯體尺寸： 32-位
速度： 80MHz
連通性： CAN，EBI/EMI，以太網(wǎng)，SCI，SPI
外圍設(shè)備： DMA，POR，PWM，WDT
輸入/輸出數(shù)： 220
程序存儲(chǔ)器容量： 1MB（1M x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 64K x 8
電壓 - 電源 (Vcc/Vdd)： 1.35 V ~ 1.65 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 40x12b
振蕩器型： 外部
工作溫度： -40°C ~ 125°C
封裝/外殼： 324-BBGA
包裝： 托盤
Electrical Characteristics
MPC5510 Microcontroller Family Data Sheet, Rev. 3
Freescale Semiconductor
27
2.5
Operating Current Specifications
Table 7. Operating Currents
Num
Characteristic
Symbol
Typ1
25C
Ambient
1 Typ - Nominal voltage levels and functional activity. Max - Maximum voltage levels and functional activity.
Typ1
70C
Ambient
Max1
-40–145C
Junction
Unit
Equations
ITOTAL = IDDE + IPP + IDDA + IDDR
IDDE = IDDE1 + IDDE2 + IDDE3
1VDDE(1,2,3) Current
VDDE(1,2,3) @ 3.0V - 5.5V
Static2, or when in SLEEP or STOP
Dynamic3
2 Static state of pins is when input pins are disabled or not being toggled and driven to a valid input level, output
pins are not toggling or driving against any current loads, and internal pull devices are disabled or not pulling
against any current loads.
3 Dynamic current from pins is application specific and depends on active pull devices, switching outputs, output
capacitive and current loads, and switching inputs. Refer to Table 8 for more information.
IDDE
1
Note 3
3
Note 3
30
Note 3
A
mA
2VPP Current
VPP @ 0V (All modes)
VPP @ 5.25V
SLEEP mode
STOP mode
RUN mode
IPP
1
15
1
20
1
30
25
A
mA
3VDDA Current
VDDA @ 4.5V - 5.25V
RUN mode4
SLEEP/STOP5 mode with 32KIRC
SLEEP/STOP5 mode with 32KOSC
SLEEP/STOP5 mode with 16MIRC
4 RUN mode is a typical application with the ADC, 16MIRC, 32KIRC running.
5 SLEEP/STOP mode means that only the listed peripherals are on. All others are diabled.
IDDA
5
12
111
5
16
165
10
26
28
225
mA
A
4VDDR Current
VDDR@ 4.5V - 5.25V
SLEEP mode
with XOSC6 (additonal)
with RTC/API (additonal)
each 8K RAM block (additional)
STOP mode
with XOSC6 (additonal)
RUN mode (Using 16 MHz IRC)
RUN mode (Maximum @ 48 MHz)7
RUN mode (Maximum @ 66 MHz)8
RUN mode (Maximum @ 80MHz)9
6 XOSC: optionally enabled in SLEEP and STOP modes (oscillator remains running from crystal but XOSC clock
output disabled).
7 RUN mode condition includes PLL selected as source of system clock, XOSC enabled with 40MHz crystal, all
peripherals enabled, both cores running, and running a typical application using both SRAM and flash.
IDDR
20
500
1
0.8
170
500
30
50
105
120
25
600
1
7
600
35
75
110
130
360
900
3
45
1500
900
40
90
120
135
A
mA
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