參數(shù)資料
型號(hào): SPC5200CBV400BR2
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 9/72頁(yè)
文件大?。?/td> 0K
描述: IC MPU 32BIT 400MHZ 272-PBGA
標(biāo)準(zhǔn)包裝: 500
系列: MPC52xx
處理器類型: 32-位 MPC52xx PowerPC
速度: 400MHz
電壓: 1.5V
安裝類型: 表面貼裝
封裝/外殼: 272-BBGA
供應(yīng)商設(shè)備封裝: 272-PBGA(27x27)
包裝: 帶卷 (TR)
MPC5200B Data Sheet, Rev. 4
Freescale Semiconductor
17
2) The interrupt latency descriptions in the table above are related to non competitive, non masked but enabled external interrupt
sources. Take care of interrupt prioritization which may increase the latencies.
Because all external interrupt signals are synchronized into the internal processor bus clock domain, each of these signals has
to exceed a minimum pulse width of more than one IP_CLK cycle.
NOTES:
1) The frequency of the IP_CLK depends on the register settings in Clock Distribution Module. See the MPC5200B User’s Manual
(MPC5200BUM) for further information.
2) If the same interrupt occurs a second time while its interrupt service routine has not cleared the former one, the second
interrupt is not recognized at all.
Besides synchronization, prioritization, and mapping the latency of an external interrupt to the start of its associated interrupt
service routine also depends on the following conditions: To get a minimum interrupt service response time, it is recommended
to enable the instruction cache and set up the maximum core clock, XL bus, and IP bus frequencies (depending on board design
and programming). In addition, it is advisable to execute an interrupt handler, which has been implemented in assembly code.
1.3.6
SDRAM
1.3.6.1
Memory Interface Timing-Standard SDRAM Read Command
Table 17. Minimum Pulse Width for External Interrupts to be Recognized
Name
Min Pulse Width
Max Pulse Width
Reference Clock
SpecID
All external interrupts (IRQs, GPIOs)
> 1 clock cycle
IP_CLK
A4.22
Table 18. Standard SDRAM Memory Read Timing
Sym
Description
Min
Max
Units
SpecID
tmem_clk
MEM_CLK period
7.5
ns
A5.1
tvalid
Control Signals, Address and MBA Valid after
rising edge of MEM_CLK
—tmem_clk ×0.5 +0.4
ns
A5.2
thold
Control Signals, Address and MBA Hold after
rising edge of MEM_CLK
tmem_clk ×0.5
ns
A5.3
DMvalid
DQM valid after rising edge of MEM_CLK
tmem_clk ×0.25 + 0.4
ns
A5.4
DMhold
DQM hold after rising edge of MEM_CLK
tmem_clk ×0.25 – 0.7
—ns
A5.5
datasetup
MDQ setup to rising edge of MEM_CLK
0.3
ns
A5.6
datahold
MDQ hold after rising edge of MEM_CLK
0.2
ns
A5.7
相關(guān)PDF資料
PDF描述
MPC857DSLZQ50B IC MPU PWRQUICC 50MHZ 357-PBGA
FSM44DSEH CONN EDGECARD 88POS .156 EYELET
CP80C88Z IC PWM CONTROLLER
CP80C88-2Z IC PWM CONTROLLER
AYF331335 CONN FPC 13POS .3MM SMD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SPC5200CBV400R2 功能描述:IC MPU 32BIT 400MHZ 272-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:MPC52xx 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點(diǎn):全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤
SPC5200CVR400 功能描述:IC MPU 32BIT 400MHZ 272-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:MPC52xx 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE(27x27) 包裝:托盤
SPC5200CVR400B 功能描述:微處理器 - MPU HABANERO AUTO PBFREE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
SPC5200CVR400BR2 功能描述:微處理器 - MPU HABANERO AUTO PB FREE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
SPC5200CVR400R2 功能描述:IC MPU 32BIT 400MHZ 272-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:MPC52xx 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA(25x25) 包裝:托盤