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參數(shù)資料
| 型號： | SP9842 |
| 英文描述： | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| 中文描述： | 8位八路，2象限乘法，BiCMOS工藝援 |
| 文件頁數(shù)： | 27/32頁 |
| 文件大?。?/td> | 745K |
| 代理商： | SP9842 |
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293
grammed gain. Please refer to the THD versus
Frequency plot, which was generated by termi-
nating a 600 Ohm source with 150 Ohms to
ground, then into this circuit. For the best gain
linearity versus code, use the largest (lowest
series impedance) coupling capacitor available,
or externally buffer the input.
Figure 13
shows an external op amp with an
inverting programmable gain. In this circuit the
maximum output swing at the DAC occurs at the
maximum circuit gain. Thus, the headroom re-
striction at the DAC output applies at the maxi-
mum gain, which, for rail–to–rail outputs (V
= 2.5V or V
/2) should be greater than 4.3. By
making the programmable gain range large, this
circuit can be used to provide rail–to–rail out-
puts even at the lower gains. This circuit has
been ratioed to provide exact integer gain incre-
ments for every increase in 25 codes, over the
range of –1 to –11. This large range of gain
comes at a slight cost — the output offset of the
DAC amplifier will be gained up by –5.12 times
at SIG OUT. If this is a problem, a second DAC
channel can be set up with a programmable DC
offset adjustment with its output summed through
a large resistor into the OP–491 inverting termi-
nal. Note that when RTRIMRANGE is set up for
only unity gain change range as in
Figure 12
,
only –0.5 times the DAC output offset will
appear at SIG OUT.
Another application for the circuits of both
Figure 10
and
13
could be to force precise gains
from circuits made from imprecise resistors. By
restricting the programmable gain range to
±
2%
(by setting R
to be 100 times R
), the
resistors could be 1% values and the program-
mable gain resolution would increase to better
than 12–bits (0.0156%). In this case, only 1% of
the DAC output offset voltage would appear at
SIG OUT.
Figure 14
shows a window comparator and two
channels of programmable-gain input. While
the input signal is shown as AC–coupled, DC
signals of up to rail–to–rail amplitude could be
measured by setting the attenuation at the signal
Figure 13. Adjustable Gain of External Inverting Opamp Circuit, V
OUT
= Rail–to–Rail.
+
–
SIG OUT
1/8 of SP9841
3
1/4 of OP–491
+5V
Set R
TRIMRANGE
for desired gain-trim range.
For R
TRIMRANGE
= 1.5kOhms:
Code 0, A
V
= -1
Code 25, A
V
= -2
Code 75, A
V
= -4
Code 175, A
V
= -8
Code 225, A
V
= -10
Code 250, A
V
= -11
Gain resolution = 4%
+
–
R
F
7.68kOhms
R
TRIMRANGE
1.5kOhms
V
REFL
= Up to V
DD
/2
1.25V
P-P
2.2μF
R
GAIN
7.68kOhms
V
REFL
+5V
V
DD
, D = 0 to 255
A
R
R
V
F
G
F
TRIMRANGE
R
D
128
R
=
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| SP9842BS | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9842KS | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| SP9842BS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9842KS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9843 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 4-Quadrant Multiplying, BiCMOS DAC |
| SP9843BS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 4-Quadrant Multiplying, BiCMOS DAC |
| SP9843KS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 4-Quadrant Multiplying, BiCMOS DAC |
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