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參數(shù)資料
| 型號(hào)： | SP9841 |
| 英文描述： | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| 中文描述： | 8位八路，2象限乘法，BiCMOS工藝援 |
| 文件頁數(shù)： | 29/32頁 |
| 文件大?。?/td> | 745K |
| 代理商： | SP9841 |
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input DACs to the proper code. The LM339
does not really drive the LED to full illumina-
tion, due to limited output current, but a pull–up
resistor alone will yield a functional TTL error
signal. External op amps could use the V
voltage as pseudoground. The outputs of the two
signal DACs must be isolated with resistors if
the two signals are to be multiplexed. This will
reduce the signal gain to 255/256 maximum,
due to the resistive divider created at the com-
parator input. If only a single channel was to be
window–compared, then the maximum gain to
the comparator would be the usual 255/128.
Figure 15
shows the schematic of an evaluation
board, which can be used with an IBM–compat-
ible (XT or AT) computer and the simple
QuickBasic routine of
Figure 16
to load each
DAC channel with its desired code. A straight–
through 25-pin cable can be used, or the board
can be plugged directly into the back of the PC.
Data is first latched into each 'HC165 parallel–
to–serial converter. Then a small state machine
is initiated by strobing INI. It clocks the latched
data into the serial data input and strobes the
LOADH input at the DAC. A pair of banana
jacks is used for applying V
from an external
supply. A trimpot–adjustable voltage reference
is tied to all eight DAC inputs. On the evaluation
board, jumpers will allow this reference to drive
any V
(X) input or the V
pin. The other
three op amps in the quad OP–491 are available
for breadboarding circuits, such as in
Figures 1
through
14
. If the reference voltage is adjusted
down to 0.5V, the DAC and the board should
function with V
DD
as low as 2.5V.
Driving Capacitive Loads
Unlike many other products, the
SP9841/9842
will not oscillate under purely capacitive load-
ing. However, fullscale step outputs will show
overshoot and ringing of up to 40% at worst–
case purely capacitive loading (between 1,000
and 10,000pF).
Figures 17
through
20
show
near fullscale steps under capacitive loads of
between 470pF and 0.47
μ
F. For capacitance up
to 10,000pF, the addition of a resistive load to
ground at the op amp output will decrease set-
tling times without adversely affecting the posi-
tive–going slew rate. For higher capacitances,
this settling time enhancement comes at the
expense of positive slew rate, as not all instan-
taneous current can be used to charge the capaci-
tor. For all values of capacitive load, settling
time can be dramatically reduced by adding a
small resistor in series with the DAC outputs.
Such series resistors will degrade the current
sinking ability at the DAC outputs for voltages
near ground; while the DACs typically sink
2mA at V
=5V at V
= 110mV, the addition
of a 50Ohm resistor would require 210mV after
the resistor to sink 2mA. Large capacitances
require lower values of series resistance in order
to obtain critical damping.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP9841BN | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9841BS | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9841KN | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9841KS | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9842 | 8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP9841BN | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9841BS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9841KN | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9841KS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
| SP9842 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC |
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