- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379399 > SP8858MGHCAR (Mitel Networks Corporation) 1·5GHz Professional Synthesiser PDF資料下載
參數(shù)資料
| 型號： | SP8858MGHCAR |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | 1·5GHz Professional Synthesiser |
| 中文描述： | 1.5 GHz的專業(yè)合成器 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 275K |
| 代理商： | SP8858MGHCAR |
11
SP8858
The selection of C1 and R1 is often approached by using
the standard representation for the second order characteristic
equation: s
2
1
2
zv
n
1
v
n2
and selecting the natural-loop
frequency and the damping factor
z
to give the desired
response. The time constants are calculated using:
2
zv
=
t
1
K/C1 and
v
n2
= K/C1 so that
C1 = K/
v
n2
and R1 = 2
zv
n
/K
Alternatively, the loop filter and formula shown in Fig. 10b
can be used to introduce a pole in F(s) at
2
1/
t
2
which will
provide additional roll-off in the closed loop transfer
characteristic in order to attenuate the reference sidebands.
The closed loop transfer function becomes:
higher order loops to use CAD tools to assess stability.
Popular analysis tools taken from control theory, such as root
locus and Bode diagrams, are useful to aid the design of the
closed loop PLL system. AN194 describes these tools in more
detail and introduces a loop filter design methodolgy aimed at
optimising the phase noise performance.
Loop filter design example
Use the demonstration board to generate a 1GHz signal
with a resolution of 500kHz (N = 5000) and reference oscillator
frequency of 40MHz. Set natural loop frequency,
v
, to
2
p
3
10
4
rad/s and damping factor to 0·7. The MQE001-1016
VCO gain, K
VCO
, is nominally 25MHz/V. Set the phase detector
output current to 2mA so that K
= 2
3
10
2
3
/2
p
A/rad.
Using the above formula, calculate the loop filter R and Cs.
K = 2
p
3
25
3
10
6
3
2
3
10
2
3
/2
p
3
5000 = 10
C1 = 10/(2
p
3
10
4
)
3
2
≈
2·5
3
10
2
9
R1 = 2
3
0·7
3
2
p3
10
4
/10
≈
8796
C2 = C1/10
≈
0·25
3
10
2
9
Realise the loop filter with C1 = 2·2nF, C2 = 220pF and
R1 = 8·2k
. The single sideband phase noise specturm for
this example is shown in Fig. 11.
+
C1
R1
C2
I
i
(s)
V
o
(s)
V
o
(s)/Ii(s) = [s(
t
1
1
t
2)
1
1]/sC1(s
t
2
1
1)
where
t
1 = C1R1 and
t
2 = C2R1
+
C1
R1
I
i
(s)
V
o
(s)
V
(s)/Ii(s) = [s(
t
1
1
1]/sC1
where
t
1 = C1R1
Fig. 10a
Fig. 10b
Fig. 10 Loop filters
0
2
10
2
20
2
30
2
40
2
50
2
60
2
70
2
80
2
90
2
100
2
110
2
120
2
130
2
140
2
150
2
160
2
170
10Hz
100Hz
1kHz
10kHz
100kHz
N
FREQUENCY
Fig. 11
Care must be taken when choosing C2 to ensure that the
additional pole does not unduly affect the stability margins of
the loop. In practice, a simple and useful rule of thumb is to set
the desired second order response as above and then set C2
to be 1/10 of C1. It is advisable when designing third order or
[s(
t
1
1
t
2
)
1
1]K
VCO
K
PD
[C1
t
2
3
1
C1s
2
1
K(
t
1
1
t
2
)s
1
K]
f
o(s)
f
i(s)
=
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP8861 | 1.3GHz Low Power Single-Chip Frequency Synthesiser(1.3GHz低功耗單片頻率合成器) |
| SP8902 | 5GHZ ±2 Fixed Modulus Divider |
| SP8902KG | MOSFET, N LOGIC D-PAKMOSFET, N LOGIC D-PAK; Transistor type:MOSFET; Transistor polarity:N; Voltage, Vds max:60V; Case style:TO-252; Current, Id cont:30A; Current, Idm pulse:100A; Power, Pd:75W; Resistance, Rds on:0.022R; SMD:1; Case |
| SP8902KGMP1S | 5GHZ ±2 Fixed Modulus Divider |
| SP8902KGMP1T | 5GHZ ±2 Fixed Modulus Divider |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP886 | 制造商:SIPAT 制造商全稱:SIPAT 功能描述:DECT RF Filters |
| SP8861 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:1·3GHz Low Power Single-Chip Frequency Synthesiser |
| SP8861/NA/HP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述: 制造商:ZARLINK 功能描述: |
| SP8861HP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:1·3GHz Low Power Single-Chip Frequency Synthesiser |
| SP8861NAHP | 制造商:Zarlink Semiconductor Inc 功能描述:PLL FREQUENCY SYNTHESIZER, 1300 MHz, PQCC28 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。