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參數(shù)資料
| 型號(hào)： | SP8855E |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | 2.8GHz Parallel Load Professional Synthesiser(2.8GHz并行負(fù)載專業(yè)合成器) |
| 中文描述： | 2.8GHz的并聯(lián)負(fù)載專業(yè)合成器（2.8GHz的并行負(fù)載專業(yè)合成器） |
| 文件頁(yè)數(shù)： | 9/14頁(yè) |
| 文件大?。?/td> | 169K |
| 代理商： | SP8855E |
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9
SP8855E
APPLICATIONS
RF Layout
The SP8855E can operate with input frequencies up to
2.8GHz but to obtain optimum performance, good RF layout
practices should be used. A suitable layout technique is to use
double sided printed circuit board with through plated holes.
Wherever possible the top surface on which the SP8855E is
mounted should be left as a continuous sheet of copper to form
a low impedance earth plane. The ground pins 12 and 16
should be connected directly to the earth plane. Pins such as
V
cc
and the unused RF input should be decoupled with chip
capacitors mounted as close to the device pin as possible with
a direct connection to the earth plane, suitable values are
10nF for the power supplies and <1nF for the RF input pin. (a
lower value should be used sufficient to give good decoupling
at the RF frequency of operation). A larger decoupling
capacitor mounted as close as possible to pin 26 should be
used to prevent modulation of V
by the charge pump pulses.
The R
set
resistor should also be mounted close to the R
set
pin
to prevent noise pick-up, and the capacitor connected from the
charge pump output should be a chip component with short
connections to the SP8855E.
When the reference is derived from a crystal connected to
pins 27 and 28 as shown in Fig.5 the oscillator components are
best mounted close to the SP8855E.
All signals such as the programming inputs, RF in
reference in and the connections to the op-amp are best taken
through the pc board adjacent to the SP8855E with through
plated holes allowing connections to remote points without
fragmenting the earth plane.
Vcc
0V
296
296
296
24, 25
F
pd,
F
ref,
OUTPUTS
3.3mA
O
C
Vcc
0V
100
μ
A
50
μ
A
100
μ
A
100
μ
A
50
μ
A
60k
60k
40k
40k
3k
3k
28
27
O
C
Fig. 7g F
pd
, and F
ref
outputs
Fig. 7h Reference oscillator
RF inputs
The prescaler has a differential input amplifier to improve
input sensitivity. Generally the input drive will be single ended
and the RF signal should be AC coupled to either of the inputs
using a chip capacitor. The remaining input should be
decoupled to ground , again using a chip capacitor. The inputs
can be driven differentially but the input circuit should not
provide DC path between inputs or to ground.
Lock detect circuit
The lock detect circuit uses the up and down correction
pulses from the phase detector to determine whether the loop
is in or out of lock. When the loop is locked, both up and down
pulses are very narrow compared to the reference frequency,
but the pulse width in the out of lock condition continuously
varies, depending on the phase difference between the
outputs of the reference and RF counters. The logical AND of
the up and down pulses is used to switch a 20
μ
A current sink
to pin 18 and a 50k resistor provides a load to V
. The circuit
is shown in Fig.7c. When lock is established, the narrow
pulses from the phase detector ensure that the current source
is off for the majority of the time and so pin18 will be pulled high
by the 50k resistor. A voltage comparator with a switching
threshold at abount 4.7V monitors the voltage at pin 18 and
switches pin 17 low when pin 18 is more positive than the 4.7V
threshold. When the loop is unlocked, the frequency
difference at the counter outputs will produce a cyclic change
in pulse width from the phase detector outputs with a
frequency equal to the difference in frequency at the reference
and RF counter outputs. A small capacitor connected to pin 18
prevents the indication of a false phase lock conditions at pin
17 for momentaary phase coincidence. Because of the
variable width pulse nature of the signal at pin 18 the
calculation of a suitable capacitor value is complex, but if an
indication with a delay amounting to several times the
expected lock up time is acceptable, the delay will be
approximately equal to the time constant of the capacitor on
pin 18 and the internal 50k resistor.
Programming inputs
The input pins are designed to be compatible with TTL or
CMOS logic with a switching threshold set at about 2.4V by
three forward biased base emitter diodes. The inputs will be
taken high by an internal pull up resistor if left open circuit but
for best noise immunity it is better to connect unused inputs
directly to V
CC
or ground.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP8855 | MOSFET; Transistor Polarity:N Channel; Drain Source Voltage, Vds:30V; Continuous Drain Current, Id:15A; On-Resistance, Rds(on):10mohm; Rds(on) Test Voltage, Vgs:10V; Package/Case:TO-252; Leaded Process Compatible:No |
| SP8855E | 2.8GHz Parallel Load Professional Synthesiser |
| SP8858 | 1·5GHz Professional Synthesiser |
| SP8858IGHCAR | 1·5GHz Professional Synthesiser |
| SP8858IGHPAS | 1·5GHz Professional Synthesiser |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP8855E/IG/HCAR | 制造商:Zarlink Semiconductor Inc 功能描述: |
| SP8858 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:1·5GHz Professional Synthesiser |
| SP8858IGHCAR | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:1·5GHz Professional Synthesiser |
| SP8858IGHPAS | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:1·5GHz Professional Synthesiser |
| SP8858MGHCAR | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:1·5GHz Professional Synthesiser |
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