參數(shù)資料
型號(hào): SP8854E
廠商: Mitel Networks Corporation
英文描述: 2·7GHz Parallel Load Professional Synthesiser
中文描述: 2.7 GHz的并聯(lián)負(fù)載專業(yè)合成器
文件頁(yè)數(shù): 6/13頁(yè)
文件大?。?/td> 176K
代理商: SP8854E
6
SP8854E
Fig. 5 Typical application diagram
1
5V
1k
+
1
44
SP8854E
7
8
9
10
11
12
13
14
15
16
17
2
3
4
5
6
43 42 41 40
23 24
22
21
20
19
18
25 26 27 28
39
38
37
36
35
34
33
32
31
30
29
F
PD
1n
REF IN
F
REF
1
5V
1
μ
10n
2·2k
100p
1
5V
1n
1n
1n
VCO
LOOP FILTER
1
30V
SP8854E
27
28
33p
100p
10MHZ
Application using
crystal reference
CONTROL
MICRO
STROBE
VALUES DEPEND
ON APPLICATION
OP27
ETC
*
*
*
*
1
5V
DESCRIPTION
Prescaler and AMcounter The programmable divider
chain is of A and M counter construction and therefore
contains a dual modulus front end prescaler, an A counter
which controls the dual modulus ratio and an M counter which
performs the bulk multi-modulus division. A programmable
divider of this construction has a division ratio of MN
1
Aand
a minimum integer steppable division ratio of N(N
2
1), where
Nis the prescaler value.
Data Entry and Storage
Data is loaded from the 16-bit bus into one of the internal
buffers by applying a positive pulse to the STROBE input. The
input bus can be driven from TTL or CMOS logic levels. When
STROBE is low, the inputs are isolated and the data can be
changed without affecting the programmed state.
When STROBE input is taken high, the Aand M counters
are reset and the input data is applied to the internal storage
register. When the STROBE input is again taken low, the data
on the input bus is stored in the internal storage register and
the Aand M counters released. The STROBE input is level
triggered so that if the data is changed whilst the input is high,
the final value before STROBE goes low will be stored.
In order to prevent disturbances on the VCO control voltage
when frequency changes are made, the STROBE input disables
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