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參數(shù)資料
| 型號(hào)： | SP8530KN |
| 元件分類： | ADC |
| 英文描述： | S2ADC - Simultaneous Sampling Analog to Digital Converter |
| 中文描述： | S2ADC -同步采樣模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 169K |
| 代理商： | SP8530KN |
SP8530DS/01 SP8530 S
2
ADC
TM
- Simultaneous Sampling Analog to Digital Converter
Copyright 2000 Sipex Corporation
2
ABSOLUTE MAXIMUM RATINGS
(TA=+25C unless otherwise noted) ..............................................
VDD to DGND .............................................................-0.3V to +7V
VDA to AGND ..............................................................-0.3V to +7V
Vin to AGND .................................................... -0.3V to VDA +0.3V
Digital Input to VSS ........................................... -0.3V to VDD+0.3V
Digital Output to VSS ........................................ -0.3V to VDD+0.3V
Operating Temp. Range
Commercial (J,K Version) ............................... 0C to 70C
Industrial (A,B Version) .............................. -40C to +85C
Storage Temperature ............................................... -65C to 150C
Lead Temperature(Solder 10sec) ........................................+300C
Power Dissipation to +70C ................................................ 500mW
Derate Above 70C ......................................................... 10mW/ C
SPECIFICATIONS
Unless otherwise noted the following specifications apply for V
DD
= 5V with limits applicable for T
A
= 25
o
C.
PARAMETER
MIN.
DC Accuracy
Resolution
Integral Linearity
J, A
K ,B
TYP.
MAX.
UNIT
CONDITIONS
12
Bits
+0.6
+0.4
+1
.
0
+0
.
75
LSB
LSB
Differential Linearity Error
J, A
K ,B
+0.5
+0.5
+1
.
0
+1
.
0
LSB
LSB
No Missing Codes
No Missing Codes
Gain Error
J, A
K,B
+0.2
+0.1
+1.0
+0.5
%FSR
%FSR
Externally Trimmable to Zero
Externally Trimmable to Zero
Offset Error
J, A
K,B
+4
+3
+7
+5
LSB
LSB
Externally Trimmable to Zero
Externally Trimmable to Zero
Gain Match
J, A
K,B
+2
+2
LSB
LSB
Offset Match
J, A
K,B
+1.0
+0.5
LSB
LSB
Externally Trimmable to Zero
Externally Trimmable to Zero
Analog Input
0 to 2
.
5
Volts
Conversion Speed
Sample Time
Conversion Time
Complete Cycle
Simultaneous Convert
Rate:
Clock Speed
Data Rate:
400
7
.
75
8
.
25
ns
μ
s
121
4
242
KHz
MHz
KHz
Simultaneous Pair
Total Data Conversion Rate
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP8531 | 12-Bit Sampling Serial Out Analog to Digital Converter |
| SP8531AN | 12-Bit Sampling Serial Out Analog to Digital Converter |
| SP8531AS | 12-Bit Sampling Serial Out Analog to Digital Converter |
| SP8531BN | 12-Bit Sampling Serial Out Analog to Digital Converter |
| SP8531BS | 12-Bit Sampling Serial Out Analog to Digital Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP8530KS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:S2ADC - Simultaneous Sampling Analog to Digital Converter |
| SP8531 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:12-Bit Sampling Serial Out Analog to Digital Converter |
| SP8531AN | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:12-Bit Sampling Serial Out Analog to Digital Converter |
| SP8531AS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:12-Bit Sampling Serial Out Analog to Digital Converter |
| SP8531BN | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:12-Bit Sampling Serial Out Analog to Digital Converter |
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