
PRELIMINARY
SP8064
Rev 0.He (09-26-05) SP8064 Ten-Channel Photo detector IC
Copyright 2005 Sipex Corporation
SIPEX RESERVES THE RIGHT TO MAKE CHANGES TO THIS DATASHEET. CALL FOR UPDATES: 1-408-934-7500.
SIPEX CONFIDENTIAL, PRELIMINARY & PROPRIETARY. DO NOT DISTRIBUTE OR
COPY
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GAIN MODE SELECTION
Gain Mode
R/W
H/L
C/D
Writing DVD+R
Writing CD-R (sample)
Writing CD-R (average)
Writing DVD+RW
Writing CD-RW
Reading DVD-ROM
Reading CD-ROM
Reading DVD+RW
Reading CD-RW
Power Down Mode*
* If no logic inputs are applied to gain select pins, Power Down Mode is default mode.
PIN ASSIGNMENTS
Land #
Pin Name
1
A
Output of A channel
2
D
Output of D channel
3
Vcc
Supply voltage. Bypass to GND with ceramic capacitor 0.1uF
4
RF+
Output of RF+ channel. RF+ = A + B + C + D
5
RF-
Output of RF- channel. RF- = - (A + B + C + D)
6
GND
Ground pin
7
B
Output of B channel
8
C
Output of C channel
9
H
Output of H channel
10
F
Output of F channel
11
R/W
Mode switch input.
12
H/L
Mode switch input.
13
C/D
Mode switch input.
14
Vref
Reference voltage. Bypass to GND with ceramic capacitor 0.1uF
15
G
Output of G channel
16
E
Output of E channel
BOARD LAYOUT AND GROUNDING
To obtain the best performance from the SP8064, a printed circuit board with ground plane is
required. Ground pins (pin #6) should be connected to the ground plane. High quality, low
series resistance ceramic 0.1uF bypass capacitors should be used at the Vcc and Vref pins
(pins #3 and #14). These capacitors must be located as close to the pins as possible. A Vref
decoupling capacitor to ground should be used. The traces connecting the pins to the ground
plane, Vcc, Vref, and bypassing capacitors must be kept short and should be made as wide
as possible.
0
0
0
0
0
1
1
1
1
X
0
0
0
1
1
0
1
0
1
0
1
0
Hi-Z
1
1
0
0/Hi-Z
1
1
Hi-Z
Pin Function