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參數(shù)資料
| 型號(hào)： | SP7652EU |
| 英文描述： | Evaluation Board Manual |
| 中文描述： | 評估板手冊 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大小： | 133K |
| 代理商： | SP7652EU |
4
Date: 08/12/04
SP7652 Wide Input Voltage Range 6A, 600kHz, Buck Regulator Copyright 2004 Sipex Corporation
General Overview
The SP7652 is a fixed frequency, voltage mode,
synchronous PWM regulator optimized for high
efficiency. The part has been designed to be
especially attractive for split plane applications
utilizing 5V to power the controller and 3V to
28V for step down conversion.
The heart of the SP7652 is a wide bandwidth
transconductance amplifier designed to accom-
modate Type II and Type III compensation
schemes. A precision 0.8V reference, present on
the positive terminal of the error amplifier per-
mits the programming of the output voltage
down to 0.8V via the V
FB
pin. The output of the
error amplifier, COMP, which is compared to a
1.1V peak-to-peak ramp is responsible for trail-
ing edge PWM control. This voltage ramp, and
PWM control logic are governed by the internal
oscillator that accurately sets the PWM fre-
quency to 600kHz.
THEORY OF OPERATION
The SP7652 contains two unique control fea-
tures that are very powerful in distributed appli-
cations. First, asynchronous driver control is
enabled during start up, to prohibit the low side
NFET from pulling down the output until the
high side NFET has attempted to turn on. Sec-
ond, a 100% duty cycle timeout ensures that the
low side NFET is periodically enhanced during
extended periods at 100% duty cycle. This guar-
antees the synchronized refreshing of the BST
capacitor during very large duty ratios.
The SP7652 also contains a number of valuable
protection features. Programmable UVLO al-
lows the user to set the exact V
IN
value at which
the conversion voltage can safely begin down
conversion, and an internal V
CC
UVLO ensures
that the controller itself has enough voltage to
properly operate. Other protection features in-
PIN DESCRIPTION
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