參數(shù)資料
型號(hào): SP7648TR
英文描述: Low Reference High Efficiency Boost Regulator
中文描述: 高效率低參考升壓穩(wěn)壓器
文件頁(yè)數(shù): 5/12頁(yè)
文件大?。?/td> 236K
代理商: SP7648TR
5
Date: 7/20/05
SP7648 Ultra-low Quiescent Current, High Efficiency Boost Regulator Copyright 2005 Sipex Corporation
_________________________DETAILED
DESCRIPTION
The SP7648 is a step-up DC-DC converter
with an input voltage operation range from
2.7V to 4.7V. In addition to the main 0.3
internal NMOSFET switch the SP7648 has
an internal synchronous rectifier, thereby
increasing efficiency and reducing the space
and cost of an external diode. An internal
inductive-damping switch significantly re-
duces inductive ringing for low noise-high
efficiency operation. If the supply voltage
drops below 0.61V the SP7648 goes into
under voltage lockout, thus opening both
internal switches. The inductor peak current
is externally programmable to allow for a
range of inductor values.
__________________________ CIRCUIT
LAYOUT
Printed circuit board layout is a critical part of
a power supply design. Poor designs can
result in excessive EMI on the feedback
paths and on the ground planes with applica-
tions involving high switching frequencies
and large peak currents. Excessive EMI can
result in instability or regulation errors. All
power components should be placed on the
PC board as closely as possible with the
traces kept short, direct, and wide (>50mils
or 1.25mm). Extra copper on the PC board
should be integrated into ground as a pseudo-
ground plane. On a multilayer PC board,
route the star ground using component-side
copper fill, then connect it to the internal
ground plane using vias. For the SP7648
THEORY OF OPERATION
devices, the inductor and input & output filter
capacitors should be soldered with their
ground pins as close together as possible in
a star-ground configuration. The V
OUT
pin
must be bypassed directly to ground as
close to the SP7648 devices as possible
(within 0.2in or 5mm). The DC-DC converter
and any digital circuitry should be placed on
the opposite corner of the PC board as far
away from sensitive RF and analog input
stages. Noisy traces, such as from the LX
pin, should be kept away from the voltage-
feedback V
FB
node and separated from it
using grounded copper to minimize EMI.
See the SP7648EB Evaluation Board
Manual for PC Board Layout design details.
________________ CONTROL SCHEME
A minimum off-time, current limited pulse
frequency modulation (PFM) control scheme
combines the high output power and effi-
ciency of a pulse width modulation (PWM)
device with the ultra low quiescent current of
the traditional PFM. At low to moderate
output loads the PFM control provides higher
efficiency than traditional PWM converters
are capable of delivering. At these loads the
switching frequency is determined by a mini-
mum off-time (T
OFF
, MIN) and a maximum
on-time (T
ON
, MAX) where:
T
OFF
< K
OFF
/ (V
OUT
- V
BATT
)
T
ON
> K
ON
/ V
BATT
K
OFF
= 1.0V
μ
s
K
ON
= 3.5 V
μ
s
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