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參數(shù)資料
| 型號： | SP682 |
| 英文描述： | Ultra-Low Power Inverting Voltage Doubler(極低功耗，反相電壓倍增器) |
| 中文描述： | 超低功耗反相電壓倍增（極低功耗，反相電壓倍增器） |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 92K |
| 代理商： | SP682 |
4
SP682DS/07
SP682 Inverting Voltage Doubler
Copyright 2000 Sipex Corporation
about 12kHz (20kHz maximum) which con-
serves power as opposed to higher frequencies
which draws more power from V
. The exter-
nal charge pump capacitors specified is 3.3
μ
F
but the absolute minimum should be 1
μ
F.
EFFICIENCY INFORMATION
A charge pump theoretically produces a doubled
voltage at 100% efficiency. However in the real
world, there is a small voltage drop on the output
which reduces the output efficiency. The
SP682
can usually run 99.9% efficient without driving
a load. While driving a 1k
load, the
SP682
remains at least 90% efficient.
Output Voltage Efficiency = V
OUT
/ (–2*V
CC
);
V
OUT
= –2*V
CC
+ V
DROP
V
DROP
= (I
OUT
)*(R
OUT
)
Power Loss = I
OUT
*(V
DROP
)
The efficiency changes as the external charge
pump capacitors are varied. Larger capacitor
values will strengthen the output and reduce
output ripple usually found in all charge pumps.
Although smaller capacitors will cost less and
save board space, lower values will reduce the
output drive capability and also increase the
output ripple.
Figure 5. Charge Pump Phase 2
Figure 4. Charge Pump Phase 1
THEORY OF OPERATION
The
SP682
's charge pump design is a simpli-
fied version of
Sipex
's original patented charge
pump design (5,306,954) except that it only
generates a negative output. The charge pump
requires external capacitors to store the charge.
Figure 1 shows the waveform found on the
negative side of capacitor C2. There is a free–
running oscillator, running at 12kHz, that con-
trols the two phases of the voltage shifting. A
description of each phase follows.
Phase 1
— V
charge storage — During this phase of
the clock cycle, the positive side of capacitors
C
and C
are initially charged to +5V. C
then switched to ground and the charge on C
is transferred to C
+5V, the voltage potential across capacitor C
2
is now 10V.
+
is
–
–
. Since C
+
is connected to
Phase 2
— V
transfer — Phase two of the clock
connects the negative terminal of C
to the
V
storage capacitor and the positive termi-
nal of C
to ground, and transfers the generated
–l0V to C
. Simultaneously, the positive side
of capacitor C
is switched to +5V and the
negative side is connected to ground.
The oscillator frequency or clock rate for the
charge pump is designed for low power opera-
tion. The oscillator operates at a frequency of
Figure 3. Charge Pump Waveform
V
CC
= +5V
–5V
–5V
+5V
C
1
C
2
+
+
–
–
V
OUT
Storage Capacitor
+
–
C
3
V
CC
= +5V
–10V
C
1
C
2
+
+
–
–
V
OUT
Storage Capacitor
+
–
C
3
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相關代理商/技術參數(shù) |
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|---|---|
| SP6828 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:+3V Low Power Voltage Inverters |
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| SP6828-5EK/TR | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:+3V Low Power Voltage Inverters |
| SP6828-5TR | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:+3V Low Power Voltage Inverters |
| SP6828EK | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:+3V Low Power Voltage Inverters |
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