參數(shù)資料
型號: SP6223EK-L
英文描述: 50mA and 150mA CMOS Linear Regulators
中文描述: 為50mA和150mA CMOS線性穩(wěn)壓器
文件頁數(shù): 5/14頁
文件大?。?/td> 379K
代理商: SP6223EK-L
5
Date: 6/15/06 Rev AB
SP6222/6223 50/150mA CMOS Linear Regulators
2006 Sipex Corporation
the output voltage based on the
following equation:
V
OUT
= V
REF
*(R1/R2 + 1)
Resistor values are not critical
because the ADJ (adjust) pin has a
high impedance, but for best
performance use resistor values of
470K
Ω
or less.
Thermal Considerations
The SP6222/6223 is designed to
provide 50mA -150mA of continuous
current in a tiny package. Maximum
power dissipation can be calculated
based on the output current and the
voltage drop across the part. To
determine the maximum power
dissipation of the package, use the
junction-to-ambient
resistance of the device and the
following equation:
thermal
P
D(MAX)
= (T
J(max)
– T
A
) /
θ
JA
T
is the maximum junction
temperature of the die and is 125
o
C.
T
is the ambient temperature.
θ
is
the junction-to-ambient thermal
resistance of the package. The SOT-
23 package has a
θ
of approximately
191
o
C/W and the SC70 package has
a
θ
JA
of approximately 330
o
C/W.
The actual power dissipation of the
regulator circuit can be determined
by using the simplified equation:
P
D
= (V
IN
– V
OUT
) * I
OUT
To prevent the device from entering
thermal shutdown, maximum power
dissipation cannot be exceeded.
Layout Considerations
The primary path of heat conduction
out of the package is via the package
leads.
Therefore, careful consideration
must be taken into account for
optimizing layout.
1. Attaching the part to a large
copper footprint will enable
better heat transfer from the
device, especially where there
are internal ground and power
planes.
2. Place the input and output
capacitors close to the device
for optimal transient response
and device behavior.
3.
Connect all ground connections
directly to the ground plane. In
case there is no ground plane,
connect to a common ground
point before connecting to
board ground.
APPLICATION INFORMATION
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