參數(shù)資料
型號: SP6139EU-L
元件分類: 穩(wěn)壓器
英文描述: 2 A SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO10
封裝: LEAD FREE, MO-187BA, MSOP-10
文件頁數(shù): 8/13頁
文件大小: 142K
代理商: SP6139EU-L
4
Date: 11/14/05
SP6139 Wide Input, 1.3MHz Synchronous PWM Controller
Copyright 2005 Sipex Corporation
General Overview
The SP6139 is a fixed frequency, voltage mode,
synchronous PWM controller optimized for high
efficiency. The part has been designed to be
especially attractive for split plane applications
utilizing 5V to power the controller and 2.5V to
20V for step down conversion.
The heart of the SP6139 is a wide bandwidth
transconductance amplifier designed to accom-
modate Type II and Type III compensation
schemes. A precision 0.8V reference present on
the positive terminal of the error amplifier per-
mits the programming of the output voltage
down to 0.8V via the VFB pin. The output of the
error amplifier, COMP, compared to a 1.1V
peak-to-peak ramp is responsible for trailing
edge PWM control. This voltage ramp and PWM
control logic are governed by the internal oscil-
lator that accurately sets the PWM frequency to
1.3MHz.
FUNCTIONAL DIAGRAM
THEORY OF OPERATION
The SP6139 contains two unique control fea-
tures that are very powerful in distributed appli-
cations. First, asynchronous driver control is
enabled during start up to prohibit the low side
NFET from pulling down the output until the
high side NFET has attempted to turn on. Sec-
ond, a 100% duty cycle timeout ensures that the
low side NFET is periodically enhanced during
extended periods at 100% duty cycle. This guar-
antees the synchronized refreshing of the BST
capacitor during very large duty ratios.
The SP6139 also contains a number of valuable
protection features. A programmable input (VIN)
UVLO allows a user to set the exact value at
which the conversion voltage is at a safe point to
begin down conversion, and an internal VCC
UVLO ensures that the controller itself has
enough voltage to properly operate. Other pro-
1.7 V
COMPARATOR
ASYNC. STARTUP
0.4 V
FAULT
CLR
COUNT 20
CLOCK
PULSES
1.2 MHZ
CLK
CLOCK PULSE GENERATOR
SS
GL HOLD OFF
100% Protection Logic
Q
R
S
RESET
DOMINANT
QPWM
CLK
SYNCHRONOUS
DRIVER
GND
3
2 GL
PWM LOOP
5 COMP
POS REF
FAULT
1
7
0.8V
CORE
REFERENCE
V
CC
FAULT
SOFTSTART INPUT
RAMP = 1.1V
VFBINT
VPOS
Gm
Gm ERROR AMPLIFIER
9 GH
8 SWN
10 BST
VFB
SS
10 A
VCC
FAULT
REF OK
FAULT
POWER FAULT
HICCUP FAULT
REF OK
VIN UVLO
VCC UVLO
2.50 VON
2.20 V OFF
6
UVIN
4.25 V ON
4.05 V OFF
Q
VCC
REF OK
200ms Delay
COUNTER
CLR
CLK
R
SET
DOMINANT
S
+
-
THERMAL
SHUTDOWN
145 C ON
135 C OFF
SHORT CIRCUIT
DETECTION
VFBINT
+ -
VPOS
0.25 V
THERMAL AND SHORT CIRCUIT PROTECTION
UVLO COMPARATORS
+
-
+
-
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