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參數(shù)資料
| 型號(hào)： | SP5768 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | 3.0GHz Low Phase Noise Frequency Synthesiser(3.0GHz低噪聲頻率合成器) |
| 中文描述： | 主頻低相噪頻率合成器（主頻低噪聲頻率合成器） |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大小： | 83K |
| 代理商： | SP5768 |
4
SP5768
Preliminary Information
Absolute Maximum Ratings
All voltages are referred to Vee at 0V
Characteristic
Supply voltage, Vcc
Pin
12
Min
-0.3
Typ
Max
7
Units
V
Conditions
RF input voltage
13,14
2.5
Vp-p
V
Differential across pins
11 and 12
RF input DC offset
13,14
-0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
Vcc+0.3
Port voltage
7,8,9,10
-0.3
V
Charge pump DC offset
1
-0.3
V
Varactor drive DC offset
16
-0.3
V
Crystal DC offset
2,3
-0.3
V
Buffered ref output
11
-0.3
V
Data, clock & enable
DC offset
5,6,4
-0.3
V
Storage temperature
-55
+125
°
C
°
C
Junction temperature
+150
MP16 thermal resistance,
chip to ambient
chip to case
80
20
°
C/W
°
C/W
Power consumption at
Vcc=5.5V
ESD protection
90
mW
All ports off
2
kV
Mil-std 883B latest revision
method 3015 cat.1.
The RF signal is fed to an internal preamplifier, which
provides gain and reverse isolation from the divider
signals. The output of the preamplifier is fed to the 17 bit
fully programmable counter, which is of MN+A
architecture. The M counter is 13 bit and the A counter
4
The output of the programmable counter is fed to the
phase comparator where it is compared in both phase
and frequency domain with the comparison frequency.
This frequency is derived either from the on board crystal
controlled oscillator or from an external reference source.
In both cases the reference frequency is divided down to
the comparison frequency by the reference divider which
is programmable into1 of 16 ratios as descried in Table
2.
The output of the phase detector feeds the charge pump
and loop amplifier section, which when used with an
external high voltage transistor and loop filter integrates
the current pulses into the varactor line voltage. The
charge pump current setting is described in Table 1,
A buffered crystal reference frequency suitable for driving
further synthesisers is available from Pin 11. If not
required this output can be disabled by connecting to
Vcc
The programmable divider output divided by 2, Fpd/2
and comparison frequency, Fcomp can be switched to
ports P0 and P1 respectively by switching the device into
test mode. The test modes are described in Table 3.
Functional description
The SP5768 contains all the elements necessary, with
the exception of a frequency reference, loop filter and
external high voltage transistor, to control a varicap
tuned local oscillator, so forming a complete PLL
frequency synthesised source. The device allows for
operation with a high comparison frequency and is
fabricated in high speed logic, which enables the
generation of a loop with excellent phase noise
performance, even with high comparison frequencies.
The package and pin allocation is shown in Figure 1 and
the block diagram in Figure 2.
The SP5768 is controlled by a standard 3-wire bus
comprising data, clock and enable inputs. The
programming word contains 28 bits, four of which are
used for port selection, 17 to set the programmable
divider ratio, four bits to select the reference division
ratio, bits RD & R0-R2, see Figure 7, two bits to set
charge pump current, bit C0 and C1, see Figure 5, and
the remaining bit to access test modes, bit T0, see
Figure 8. The programming format is shown in Figure 4.
The clock input is disabled by an enable low signal, data
is therefore only loaded into the internal shift registers
during an enable high and is clocked into the controlling
buffers by an enable high to low transition. This load is
also synchronised with the programmable divider so
giving smooth fine tuning.
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| SP5769 | 3GHz I2C Bus Synthesiser |
| SP5769A | 3GHz I2C Bus Synthesiser |
| SP5769AKG | 3GHz I2C Bus Synthesiser |
| SP5769AKGMP1S | Circular Connector; No. of Contacts:66; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:18; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:18-35 RoHS Compliant: No |
| SP5769AKGMP1T | Circular Connector; No. of Contacts:9; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:18; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:18-96 RoHS Compliant: No |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP5768KG | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:3.0 GHz Low Phase Noise Frequency Synthesiser |
| SP5768MP1S | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:3.0 GHz Low Phase Noise Frequency Synthesiser |
| SP5768MP1T | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:3.0 GHz Low Phase Noise Frequency Synthesiser |
| SP5769 | 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:3GHz I2C Bus Synthesiser |
| SP5769A | 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:3GHz I2C Bus Synthesiser |
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