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參數(shù)資料
| 型號(hào)： | SP5768 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | 3.0 GHz Low Phase Noise Frequency Synthesiser |
| 中文描述： | 3.0 GHz的低相位噪聲頻率合成器 |
| 文件頁(yè)數(shù)： | 3/10頁(yè) |
| 文件大?。?/td> | 104K |
| 代理商： | SP5768 |
3
SP5768
Electrical Characteristics (continued)
These characteristics are guaranteed by either production test or design. They apply within the specified ambient
temperature and supply voltage unless otherwise stated. Tamb = -40
°
C to 80
°
C, Vcc = +4
·
5V to +5
·
5V
Characteristic
Pin
Value
Typ
Units
Conditions
Min
Max
Charge pump output
current
1
See Table 1
Vpin1 = 2V
Charge pump output
leakage
1
±
3
±
10
nA
Vpin1=2V, Vcc = +5.0V,
Tamb = 25
°
C
Charge pump drive
output current
16
0.5
mA
Vpin 16=0.7V
Crystal frequency
2,3
2
20
MHz
See Figure 5 for application
External reference input
frequency
3
2
20
MHz
Sinewave coupled through
10F blocking capacitor
External reference drive
level
3
0.2
0.5
Vpp
Sinewave coupled through
10nF blocking capacitor
Buffered reference
frequency output
output amplitude
output impedance
Comparison frequency
11
AC coupled, See note 1
0.35
250
Vpp
MHz
2-20MHz
4
Equivalent phase noise
at phase detector
-148
dBc/Hz
At 10 kHz, SSB, with 2 MHz
comparison from 4 MHz
crystal reference
RF division ratio
240
131071
Reference division ratio
2
320
See Table 2
Output ports P0-P3
sink current
leakage current
7,8,9,10
See Note 2
Vport = 0.7V
Vport = Vcc
2
mA
μ
A
10
1
2
Reference output disabled by connecting to Vcc if not required
Output ports high impedance on power up, with data, clock and enable at logic 0
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