參數(shù)資料
型號: SP5655SKG
廠商: Mitel Networks Corporation
英文描述: 2·7GHz Bidirectional I2C Bus Controlled Synthesiser
中文描述: 2.7 GHz的雙向I2C總線控制合成器
文件頁數(shù): 5/12頁
文件大?。?/td> 220K
代理商: SP5655SKG
5
SP5655
Table 1 Write data format (MSB transmitted first)
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Address
Programmable divider
Programmable divider
Charge pump and test bits
I/O port control bits
1
2
14
2
6
CP
P6
0
2
13
2
5
T1
P5
0
2
12
2
4
T0
P4
0
2
11
2
3
TS2
P3
MA0
2
9
2
1
TS0
X
MA1
2
10
2
2
TS1
X
A
A
A
A
A
MSB
1
0
2
7
1
P7
LSB
0
2
8
2
0
OS
P0
Fig. 3 Data formats
A
MA1, MA0
CP
T1
T0
TS2, TS1, TS0
OS
P7, P6, P5, P4, P3, P0
:
POR
FL
I2, I1, I0
A2, A1, A0
X
:
:
:
:
:
:
:
Acknowledge bit
Variable address bits (see Table 4)
Charge Pump current select
Test mode selection
Charge pump disable
Operation mode control bits (see Table 5)
Varactor drive Output disable Switch
Control output port states
Power On Reset indicator
Phase lock detect flag
Digital information from ports P7, P5 and P4 respectively
5-level ADC data from P6 (see Table 3)
Don’t care
:
:
:
:
:
Table 2 Read data format
1
POR
1
A0
Byte 1
Byte 2
Address
Status byte
1
FL
0
I2
0
I1
0
I0
MA0
A1
MA1
A2
A
A
Address select input voltage
0V to 0·2V
CC
Always valid
0·3V
CC
to 0·7V
CC
0·8V
CC
to 13·2V
Table 3 ADC levels
MA0
0
1
0
1
MA1
0
0
1
1
Table 4 Address selection
Voltage input to P6
0·6V
CC
to 13·2V
0·45V
CC
to 0·6V
CC
0·3V
CC
to 0·45V
CC
0·15V
CC
to 0·3V
CC
0V
to 0·15V
CC
A1
0
1
1
0
0
A2
1
0
0
0
0
A0
0
1
0
1
0
T1
0
0
1
1
1
1
1
TS2
X
X
0
0
1
1
1
TS1
X
X
0
1
0
0
1
TS0
0
1
X
X
0
1
X
Operation mode description
Normal operation, test modes disabled, reference divider ratio = 1024
Normal operation, test modes disabled, reference divider ratio = 512
Charge pump source (down). Status bit FL set to 0
Charge pump sink (up). Status bit FL set to 1
Ports P4, P5, P6, P7set to state X
Port P7 = F
PD
/2; P4, P5, P6 set to state X
Port P7 = F
PD
; P6 = F
COMP
; P4, P5 set to state X
Table 5 Operation modes
NOTES
X = don’t care
For further details of test modes, see Table 6
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