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參數(shù)資料
| 型號(hào)： | SP432 |
| 英文描述： | High Speed, Low Power Quad RS-422 Differential Line Receiver |
| 中文描述： | 高速，低功耗四的RS - 422差分線路接收器 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 363K |
| 代理商： | SP432 |
2
SP432DS/10 SP432 High Speed, Low Power Quad Differential Line Receiver Copyright 1997 Sipex Corporation
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at
these ratings or any other above those indicated in the operation sections
of the specifications below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect reliability and
cause permanent damage to the device.
V
CC
(SupplyVoltage).......................................................................+7.0V
V
CM
(Common Mode Range)...........................................................
±
14V
V
DIFF
(Differential Input Voltage)......................................................
±
14V
V
IN
(Enable Input Voltage)..............................................................+7.0V
T
STG
(Storage Temperature Range)..............................-65
°
C to +150
°
C
Lead Temperature (4sec)............................................................+260
°
C
Maximum Current Per Output......................................................
±
25mA
Storage Temperature....................................................-65
°
C to +150
°
C
Power Dissipation Per Package
16-pin PDIP (derate 14.3mW/
o
C above +70
o
C)........................1150mW
16-pin NSOIC (derate 8.95mW/
o
C above +70
o
C).......................725mW
Figure 1. SP432 Block Diagram
ESD
RI4A RI4B
V
CC
GND
R04
R02
R03
R01
INPUTS
RI3A RI3B
OUTPUTS
ENABLE
ENABLE
RI2A RI2B
RI1A RI1B
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