
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
12
The circuit model in Figures 18
and 19 represent
the typical ESD testing circuit used for all three
methods. The C
S
is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through R
S
, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (R
) and the source capacitor (C
) are
1.5k
an 100pF, respectively. For IEC-1000-4-2,
the current limiting resistor (R
) and the source
capacitor (C
S
) are 330
an 150pF, respectively.
Figure 18. ESD Test Circuit for Human Body Model
R
R
C
C
C
C
S
S
R
R
S
S
SW1
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
Figure 20. ESD Test Waveform for IEC1000-4-2
i
30A
Figure 19. ESD Test Circuit for IEC1000-4-2
R
R
S
R
R
V
R
S
and
R
V
add up to 330
for IEC1000-4-2.
Contact-Discharge Module
R
R
V
V
V
R
R
C
C
C
C
S
S
R
R
S
S
SW1
SW2
R
C
Device
Test
DC Power
Source
C
S
R
S
devised to reduce the unpredictability of the ESD
arc. The discharge current rise time is constant
since the energy is directly transferred without the
air-gap arc. In situations such as hand held systems,
the ESD charge can be directly discharged to the
equipment from a person already holding the
equipment. The current is transferred on to the
keypad or the serial port of the equipment directly and
then travels through the PCB and finally to the IC.
The higher C
value and lower R
value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor
injects a higher voltage to the test point when SW2
is switched on. The lower current limiting resistor
increases the current charge onto the test point.
t=0ns
t=30ns
0A
15A
t