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參數(shù)資料
| 型號： | SP3249ECA |
| 元件分類： | RS-232 |
| 英文描述： | 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors |
| 中文描述： | 5V的高速RS - 232收發(fā)器與0.1uF電容 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 128K |
| 代理商： | SP3249ECA |
7
Rev.4/08/02
SP3249E Intelligent +3.0V to +5.5V RS-232 Transceivers
Copyright 2002 Sipex Corporation
Charge Pump
The charge pump is a Sipex–patented design
(U.S. #5,306,954) and uses a unique approach
compared to older less–efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of the
input voltage (V
) over the +3.0V to +5.5V
range. This is important to maintain compliant
RS-232 levels regardless of power supply
fluctuations.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump is
disabled. This oscillator controls the four phases
of the voltage shifting (Figure 13). A descrip-
tion of each phase follows.
Phase 1
(Figure 11)
— V
charge storage — During this phase of
the clock cycle, the positive side of capacitors
C
and C
are initially charged to V
. C
l
then switched to GND and the charge in C
transferred to C
V
, the voltage potential across capacitor C
2
is
now 2 times V
CC
.
+
is
–
is
–
. Since C
+
is connected to
Figure 7. Loopback Test Circuit for RS-232 Driver Data
Transmission Rates
Phase 2
(Figure 12)
— V
transfer — Phase two of the clock
connects the negative terminal of C
to the V
SS
storage capacitor and the positive terminal of C
2
to GND. This transfers a negative generated
voltage to C
. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C
, the positive side of capacitor C
is switched
to V
CC
and the negative side is connected to
GND.
Phase 3
(Figure 14)
Figure 8. Loopback Test Circuit Result at 120kbps
(All Drivers Fully Loaded)
Figure 9. Loopback Test Circuit result at 250kbps
(All Drivers Fully Loaded)
SP3249E
TxIN
TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1
μ
F
0.1
μ
F
0.1
μ
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
μ
F
0.1
μ
F
LOGIC
INPUTS
V
CC
5k
RxIN
RxOUT
LOGIC
OUTPUTS
GND
1000pF
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SP3249ECA-L | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| SP3249ECA-L/TR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| SP3249ECY | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| SP3249ECY/TR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| SP3249ECY-L | 功能描述:RS-232接口集成電路 Intel. +3V to +5.5V RS-232 RoHS:否 制造商:Exar 數(shù)據(jù)速率:52 Mbps 工作電源電壓:5 V 電源電流:300 mA 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-100 封裝: |
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