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參數(shù)資料
| 型號： | SP3203EEY-L |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 15/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX RS232 ESD 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 74 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 3/2 |
| 規(guī)程： | RS232 |
| 電源電壓： | 3 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 其它名稱： | 1016-1067-5 |
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (50)668-707 www.exar.com
SP3203E_00_2080
8
The charge pump operates in a discontinu-
ous mode using an internal oscillator. If the
output voltages are less than a magnitude
of 5.5V, the charge pump is enabled. If the
outputvoltages exceedamagnitudeof5.5V,
the charge pump is disabled. This oscillator
controls the four phases of the voltage shift-
ing. A description of each phase follows.
Phase 1
— V
SS charge storage — During this phase
of the clock cycle, the positive side of capaci-
tors C
and C2 are initially charged to VCC.
C
l
+
is then switched to GND and the charge
in C
–
is transferred to C
2
–
. Since C
2
+
is con-
nected to V
CC, the voltage potential across
capacitor C
2 is now 2 times VCC.
Phase 2
— V
SS transfer — Phase two of the clock
connectsthenegativeterminalofC
2 to the VSS
storagecapacitorandthepositiveterminalof
C
2 to GND. This transfers a negative gener-
ated voltage to C
3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the volt-
age to C
3, the positive side of capacitor C
is switched to V
CC and the negative side is
connected to GND.
Phase 3
— V
DD charge storage — The third phase of
the clock is identical to the first phase — the
charge transferred in C
produces –VCC in
the negative terminal of C
, which is applied
to the negative side of capacitor C
2. Since
C
2
+
is at V
CC, the voltage potential across C2
is 2 times V
CC.
Table 2. SHUTDOWN Truth Tables
(Note: When the device is shutdown, the SP3203E's
charge pump is turned off and V+ decays to Vcc, V- is
pulledtogroundandthetransmitteroutputsaredisabled
as High Impedance.)
Figure 2. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
Phase 4
— V
DD transfer — The fourth phase of
the clock connects the negative terminal
of C
2 to GND, and transfers this positive
generated voltage across C
2 to C4, the
V
DD storage capacitor.
This voltage is
regulated to +5.5V. At this voltage, the in-
ternal oscillator is disabled. Simultaneous
with the transfer of the voltage to C
4, the
positivesideofcapacitorC
is switched to VCC
and the negative side is switched to GND, al-
lowingthechargepumpcycletobeginagain.
The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator are present.
Since both V+ and V– are separately gener-
ated from V
CC, in a no–load condition V
+
and V– will be symmetrical. Older charge
pump approaches that generate V– from
V+ will show a decrease in the magnitude
of V– compared to V+ due to the inherent
inefficiencies in the design.
V
L Supply Level
Device: SP3203E
SHUTDOWN T
XOUT
R
XOUT
Charge
Pump
0
High-Z
Inactive
Active
SP3203E
1
3
5
4
2
6
19
GND
T1IN
TXIN
C1+
C1-
C2+
C2-
V+
V-
VCC
+
C2
C5
C1
+
C3
C4
+
0.1F
TTL/CMOS
INPUTS
+3V to +5V
18
SHUTDOWN
20
5K
R1OUT
5K
RXIN
RXOUT
TTL/CMOS
OUTPUTS
R1IN
TXOUT
T1OUT
VCC
1000pF
12
VL
+3V to +5.5V
0.1F
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP3203EEY-L | 制造商:Exar Corporation 功能描述:IC RS-232 TRANSCEIVER 5.5V TSSOP-20 制造商:Exar Corporation 功能描述:IC, RS-232 TRANSCEIVER, 5.5V, TSSOP-20 |
| SP3203EEY-L/TR | 功能描述:RS-232接口集成電路 RS232 W/ 1.8V LOGIC 3-DRVR/2-RCVR RoHS:否 制造商:Exar 數(shù)據(jù)速率:52 Mbps 工作電源電壓:5 V 電源電流:300 mA 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-100 封裝: |
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