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參數(shù)資料
| 型號： | SP26LV432 |
| 英文描述： | High Speed, Low Power Quad RS-422 Differential Line Receiver |
| 中文描述： | 高速，低功耗四的RS - 422差分線路接收器 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 124K |
| 代理商： | SP26LV432 |
8
Rev:A Date: 3/08/04 SP26LV432 High Speed, Low Power Quad Differential Line Receiver
Copyright 2004 Sipex Corporation
The
SP26LV432
is a low-power quad differen-
tial line receiver designed for digital data trans-
mission meeting specifications of the EIA
standard RS-422 protocol. The
SP26LV432
fea-
tures Sipex's BiCMOS process allowing low
power operational characteristics of CMOS tech-
nology while meeting all of the demands of the
RS-422 serial protocol to at least 50Mbps under
load in harsh environments.
The RS-422 standard is ideal for multi-drop
applications and for long-distance communica-
tion. The RS-422 protocol allows up to 10
receivers to be connected to a data bus, making
it an ideal choice for multi-drop applications.
Since the cabling can be as long as 4,000 feet, the
RS-422 receivers have an input sensitivity of
200mV over the wide (-7.0V to +7.0V) common
mode range to accommodate ground potential
differences. Internal pull-up and pull-down
resistors prevent output oscillation on unused
channels. Because the RS-422 is a differential
interface, data is virtually immune to noise in the
transmission line.
Figure 21. Two-Wire Balanced Systems, RS-422
*R
T
ENABLE
DATA
DATA
OUTPUT
*R
is optional although highly
recommended to reduce reflection.
Driver Side such as SP26LV431
Receiver Side such as SP26LV432
Figure 20. Truth Table, Enable/Disable Function
Common to all Four RS-422 Receivers
The
SP26LV432
accepts RS-422 levels and
translates these into TTL or CMOS input levels.
The
SP26LV432
features active HIGH and ac-
tive LOW receiver enable controls common to
all four receiver channels. A logic HIGH on the
ENABLE pin (pin 4) or a logic LOW on the
ENABLE pin (pin 12) will enable the differen-
tial receiver outputs. A logic LOW on the
ENABLE pin (pin 4) and a logic HIGH on the
ENABLE pin (pin 12) will force the receiver
outputs into high impedance (high-Z). Refer to
the truth table in
Figure 20
.
The RS-422 line receivers feature high source
and sink current capability. All receivers are
internally protected against short circuits on their
inputs. The receivers feature tri-state
outputs with 6mA source and sink capability.
The typical receiver propagation delay is 14ns
(35ns max).
To minimize reflections, the multipoint bus
transmission line should be terminated at both
ends in its characteristic impedance, and stub
lengths off the main line should be kept as short
as possible.
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THEORY OF OPERATION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SP26LV432_06 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:High-Speed, Low-Power Quad RS-422 Differential Line Receiver |
| SP26LV432CN | 制造商:Exar Corporation 功能描述: |
| SP26LV432CN/TR | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:High-Speed, Low-Power Quad RS-422 Differential Line Receiver |
| SP26LV432CN-L | 功能描述:RS-422接口集成電路 HIGH SPD +3.3V QUAD RS-422 DIFFERENTIAL RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率: 工作電源電壓:5 V 電源電流:35 mA 工作溫度范圍: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-16 封裝:Tube |
| SP26LV432CN-L/TR | 功能描述:RS-422接口集成電路 HIGH SPD +3.3V QUAD RS-422 DIFFERENTIAL RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率: 工作電源電壓:5 V 電源電流:35 mA 工作溫度范圍: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-16 封裝:Tube |
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