參數(shù)資料
型號(hào): SP1674BJL
元件分類(lèi): ADC
英文描述: 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC28
封裝: PLASTIC, LCC-28
文件頁(yè)數(shù): 2/15頁(yè)
文件大?。?/td> 150K
代理商: SP1674BJL
SP574B/674B/1674B/774B
12–Bit Sampling A/D Converters
Copyright 2000 Sipex Corporation
10
A
0 may be toggled without damage to the con-
verter at any time. Break–before–make action is
guaranteed between the two data bytes. This as-
sures that the outputs which are strapped together
in Figure 5 will never be enabled at the same time.
In Figure 7, it can be seen that a read operation
usually begins after the conversion is complete and
STS is low. If earlier access is needed, the read can
begin no later than the addition of times t
DD and tHS
before STS goes low.
"NYQUIST" SAMPLING
Each of the SPx74B analog-to-digital convert-
ers has been designed to provide Nyquist sam-
pling (highest input frequency is 1/2 of the
sampling rate) data conversion with no degra-
dation in DC performance. This is shown in
Figure 10. Note that the Differential Linearity
and Integral Linearity min/max values are well
within the
± 1/2 LSB limits of a K-version
Converter. Also, the Typical FFT at Nyquist
rates shown on Figure 10 reflect the values
listed in the Typical AC Dynamics table.
STS
DELAY
R
CK
Q
D
H
D
CK
Q
EOC8
EOC12
CE
R/C
A0
CS
12/8
READ CONTROL
A0 LATCH
INPUT BUFFERS
NIBBLE B ZERO
OVERRIDE
NIBBLE A, B
NIBBLE C
Figure 4. SPx74B Control Logic
28
27
26
25
24
23
22
21
20
19
18
17
16
15
STS
DB11 (MSB)
DB0 (LSB)
DIG
COM
SPx74B
2
4
A0
ADDRESS BUS
A0
12/8
DATA
BUS
Figure 5. Interfacing SPx74B to 8–Bit Interface Bus
OBSOLETE
-
HIST
ORICAL
REFERENCE
ONL
Y
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