參數(shù)資料
型號(hào): SP1001-05XTG
元件分類: TVS二極管 - 瞬態(tài)電壓抑制
英文描述: BIDIRECTIONAL, 5 ELEMENT, SILICON, TVS DIODE
封裝: GREEN, PLASTIC PACKAGE-6
文件頁數(shù): 2/6頁
文件大?。?/td> 423K
代理商: SP1001-05XTG
2011 Littelfuse, Inc.
Specifications are subject to change without notice.
Please refer to www.littelfuse.com/SPA for current information.
22
TVS Diode Arrays (SPAFamily of Products)
Revision: June 27, 2011
SP1001 Series
General Purpose ESD Protection - SP1001 Series
Absolute Maximum Ratings
Symbol
Parameter
Value
Units
I
PP
Peak Current (t
p=8/20μs)
2
A
T
OP
Operating Temperature
-40 to 85
°C
T
STOR
Storage Temperature
-60 to 150
°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress only rating and operation of the device
at these or any other conditions above those indicated in the operational sections of this
specification is not implied.
Electrical Characteristics (T
OP = 25°C)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Forward Voltage Drop
V
F
I
F=10mA
0.7
0.9
1.2
V
Reverse Voltage Drop
V
R
I
R=1mA
7.0
7.8
8.5
V
Reverse Standoff Voltage
V
RWM
I
R≤1A
5.5
V
Reverse Leakage Current
I
LEAK
V
R=5V
0.5
A
Clamp Voltage1
V
C
I
PP=1A, tp=8/20s, Fwd
8.0
11.0
V
I
PP=2A, tp=8/20s, Fwd
9.7
13.0
V
Dynamic Resistance
R
DYN
(V
C2 - VC1) / (IPP2 - IPP1)
1.7
Ω
ESD Withstand Voltage1,2
V
ESD
IEC61000-4-2 (Contact)
±15
kV
IEC61000-4-2 (Air)
±30
kV
Diode Capacitance1
C
D
Reverse Bias=0V
12
pF
Reverse Bias=2.5V
8
pF
Reverse Bias=5V
7
pF
Notes:
1
Parameter is guaranteed by device characterization
2
A minimum of 1,000 ESD pulses are applied at 1s intervals between the anode and common cathode of each diode
Thermal Information
Parameter
Rating
Units
Storage Temperature Range
-65 to 150
°C
Maximum Junction Temperature
150
°C
Maximum Lead Temperature (Soldering
20s-40s)
260
°C
Capacitance vs. Reverse Bias
0
2
4
6
8
10
12
14
DC Bias (V)
Capacitance
(pF)
0
0.5
11.5
2
2.5
3
3.5
4
4.5
5
5.5
6
Design Consideration
Because of the fast rise-time of the ESD transient,
placement of ESD devices is a key design consideration.
To achieve optimal ESD suppression, the devices should be
placed on the circuit board as close to the source of the ESD
transient as possible. Install the ESD suppressors directly
behind the connector so that they are the first board-level
circuit component encountered by the ESD transient. They
are connected from signal/data line to ground.
相關(guān)PDF資料
PDF描述
SP1003-01DTG UNIDIRECTIONAL, SILICON, TVS DIODE
SP1N6077US 1.3 A, SILICON, RECTIFIER DIODE
MX1N6076US 1.3 A, SILICON, RECTIFIER DIODE
SP1N6078US 1.3 A, SILICON, RECTIFIER DIODE
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