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參數(shù)資料
| 型號： | SNJ54LVC573AFKR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20 |
| 封裝： | HERMETIC SEALED, CERAMIC, LCC-20 |
| 文件頁數(shù)： | 27/29頁 |
| 文件大?。?/td> | 1121K |
| 代理商： | SNJ54LVC573AFKR |
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PARAMETER MEASUREMENT INFORMATION
VM
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
VLOAD
Open
GND
RL
Data Input
Timing Input
VI
0 V
VI
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPLH
VOH
VOL
VI
0 V
Input
Output
Waveform 1
S1 at VLOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VLOAD/2
0 V
VOL + V
VOH – V
≈0 V
VI
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 .
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VM
VI
VM
1.8 V
± 0.15 V
2.5 V
± 0.2 V
2.7 V
3.3 V
± 0.3 V
1 k
500
500
500
VCC
RL
2
× VCC
2
× VCC
6 V
VLOAD
CL
30 pF
50 pF
0.15 V
0.3 V
V
VCC
2.7 V
VI
VCC/2
1.5 V
VM
tr/tf
≤2 ns
≤2.5 ns
INPUTS
SN54LVC573A, SN74LVC573A
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCAS300R – JANUARY 1993 – REVISED SEPTEMBER 2005
Figure 1. Load Circuit and Voltage Waveforms
7
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