參數資料
型號: SNJ54HC7001FK
英文描述: Quad 2-input AND Gate
中文描述: 四2輸入與門
文件頁數: 2/6頁
文件大小: 90K
代理商: SNJ54HC7001FK
SN54CBTD3384, SN74CBTD3384
10-BIT FET BUS SWITCHES
WITH LEVEL SHIFTING
SCDS025K – MAY 1995 – REVISED NOVEMBER 1998
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram (positive logic)
Pin numbers shown are for the DB, DBQ, DGV, DW, JT, PW, and W packages.
3
2
1A1
1B1
11
1A5
1
1OE
10
1B5
14
15
2A1
2B1
22
2A5
13
2OE
23
2B5
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Continuous channel current
Input clamp current, I
IK
(V
I/O
< 0)
Package thermal impedance,
θ
JA
(see Note 2): DB package
–0.5 V to 7 V
–0.5 V to 7 V
128 mA
–50 mA
104
°
C/W
113
°
C/W
139
°
C/W
81
°
C/W
120
°
C/W
–65
°
C to 150
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DBQ package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
SN54CBTD3384
MIN
SN74CBTD3384
MIN
UNIT
MAX
MAX
VCC
VIH
VIL
TA
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs literature number SCBA004.
Supply voltage
4.5
5.5
4.5
5.5
V
High-level control input voltage
2
2
V
Low-level control input voltage
0.8
0.8
V
°
C
Operating free-air temperature
–55
125
–40
85
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