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參數(shù)資料
| 型號： | SNJ54AHC594FK |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-BIT SHIFT REGISTERS WITH OUTPUT REGISTERS |
| 中文描述： | 8位移位寄存器與輸出寄存器 |
| 文件頁數(shù)： | 6/17頁 |
| 文件大小： | 443K |
| 代理商： | SNJ54AHC594FK |
SCLS423F JUNE 1998 REVISED SEPTEMBER 2003
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
°
C
TYP
SN54AHC594
MIN
1.9
SN74AHC594
MIN
1.9
UNIT
MIN
1.9
MAX
MAX
MAX
2 V
2
IOH = 50 A
3 V
2.9
3
2.9
2.9
4.5 V
4.4
4.5
4.4
4.4
VOH
IOH = 4 mA
QH
′
, IOH = 4 mA
QAQH, IOH = 8 mA
3 V
2.58
2.48
2.48
V
4.5 V
3.94
3.8
3.8
3.94
3.8
3.8
2 V
0.1
0.1
0.1
IOL = 50 A
3 V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
VOL
IOL = 4 mA
QH
′
, IOL = 4 mA
QAQH, IOL = 8 mA
VI = 5.5 V or GND
VI = VCC or GND,
VI = VCC or GND
3 V
0.36
0.5
0.44
V
4.5 V
0.36
0.5
0.44
0.36
0.5
0.44
II
ICC
Ci
0 V to 5.5 V
±
0.1
±
1*
40
±
1
40
A
IO = 0
5.5 V
4
A
5 V
2
10
10
pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
timing requirements over recommended operating free-air temperature range, V
CC
= 3.3 V
±
0.3 V
(unless otherwise noted) (see Figure 1)
TA = 25
°
C
MIN
5.5
SN54AHC594
SN74AHC594
UNIT
MAX
MIN
5.5
MAX
MIN
5.5
MAX
tw
Pulse duration
RCLK or SRCLK high or low
ns
RCLR or SRCLR low
SER before SRCLK
↑
SRCLK
↑
before RCLK
↑
SRCLR low before RCLK
↑
SRCLR high (inactive) before SRCLK
↑
RCLR high (inactive) before RCLK
↑
SER after SRCLK
↑
5
5
5
3.5
3.5
3.5
8
8.5
8.5
tsu
Setup time
8
9
9
ns
4.2
4.8
4.8
4.6
5.3
5.3
th
Hold time
1.5
1.5
1.5
ns
This setup time allows the
storage register to receive stable data from the shift register. The clocks can be tied together, in which case the shift
register is one clock pulse ahead of the storage register.
1
%'(#&%
!%!$(%
)("!
% $ '(#&2$
&& &% $(
($$(2$
(
$0%
)$!'!&%
!&%0$ ( !%%"$
)&$
' $2$+)#$%,
&($ $0%
$$
&(&!$(!
%("#$%
."
0&+,
$-&
$ (0
)("!
%!$,
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