- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365667 > SNJ54AC533J (Texas Instruments, Inc.) OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS PDF資料下載
參數(shù)資料
| 型號： | SNJ54AC533J |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| 中文描述： | 有三態(tài)輸出的8個透明D型鎖存器 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 271K |
| 代理商： | SNJ54AC533J |
SCAS555C NOVEMBER 1995 REVISED OCTOBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
2-V to 6-V V
CC
Operation
Inputs Accept Voltages to 6 V
Max t
pd
of 10.5 ns at 5 V
3-State Inverting Outputs Drive Bus Lines
Directly
Full Parallel Access for Loading
description/ordering information
The ’AC533 devices are octal transparent D-type
latches with 3-state outputs. When the
latch-enable (LE) input is high, the Q outputs
follow the complements of the data (D) inputs.
When LE is taken low, the Q outputs are latched
at the inverse logic levels set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
OE does not affect the internal operations of the
latches. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP N
Tube
SN74AC533N
SN74AC533N
SOIC DW
Tube
SN74AC533DW
AC533
Tape and reel
SN74AC533DWR
40 C to 85 C
SOP NS
Tape and reel
SN74AC533NSR
AC533
SSOP DB
Tape and reel
SN74AC533DBR
AC533
TSSOP PW
Tube
SN74AC533PW
AC533
Tape and reel
SN74AC533PWR
CDIP J
Tube
SNJ54AC533J
SNJ54AC533J
55 C to 125 C
CFP W
Tube
SNJ54AC533W
SNJ54AC533W
LCCC FK
Tube
SNJ54AC533FK
SNJ54AC533FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
!"
"#"
"$%#"
%%!"
# $ &'(#"
$ !*#
" "!!#%(,
#!) %
"$%
&!$#"
%"
&#%#!!%)
&!% ! !%
&%!"-
"%!"
#"#%
+#%%#",)
$ #((
!
"(!
!"-
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
SN54AC533 . . . J OR W PACKAGE
SN74AC533 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
SN54AC533 . . . FK PACKAGE
(TOP VIEW)
1
1
O
5
5
8
4
G
L
V
C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SNJ54AC533W | OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SNJ54AHC139FK | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
| SNJ54AHC139J | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
| SNJ54AHC139W | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
| SNJ54AHC367FK | HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SNJ54AC533W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SNJ54AC534FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SNJ54AC534J | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SNJ54AC534W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SNJ54AC563FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS |
發(fā)布緊急采購，3分鐘左右您將得到回復。