- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373483 > SNJ54ABT162823AWD (Texas Instruments, Inc.) 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS PDF資料下載
參數(shù)資料
| 型號： | SNJ54ABT162823AWD |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 18位總線接口倒裝3觸發(fā)器態(tài)輸出 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 186K |
| 代理商： | SNJ54ABT162823AWD |
SCBS666B JULY 1996 REVISED JUNE 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
Widebus
Family
Output Ports Have Equivalent 25-
Series
Resistors So No External Resistors Are
Required
Typical V
OLP
(Output Ground Bounce)
<1 V at V
CC
= 5 V, T
A
= 25
°
C
High-Impedance State During Power Up
and Power Down
I
off
and Power-Up 3-State Support Hot
Insertion
Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
description/ordering information
These 18-bit bus-interface flip-flops feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing wider buffer registers, I/O ports,
bidirectional bus drivers with parity, and working
registers.
The ’ABT162823A devices can be used as two
9-bit flip-flops or one 18-bit flip-flop. With the
clock-enable (CLKEN) input low, the D-type
flip-flops enter data on the low-to-high transitions
of the clock. Taking CLKEN high disables the
clock buffer, thus latching the outputs. Taking the
clear (CLR) input low causes the Q outputs to go
low independently of the clock.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP DL
Tube
SN74ABT162823ADL
ABT162823A
40 C to 85 C
Tape and reel
SN74ABT162823ADLR
TSSOP DGG
Tape and reel
SN74ABT162823ADGGR
ABT162823A
55
°
C to 125
°
C
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
CFP WD
Tube
SNJ54ABT162823AWD
SNJ54ABT162823AWD
Copyright
2004, Texas Instruments Incorporated
!"#$%&' #"'('
')"*%("' #$**&' ( ") +$,-#("' !(&. *"!$#
+&#)#("'
+&* & &*% ") &/(
*"!$#"'
+*"#&'2
!"& '" '&#&(*-1
+(*(%&&*.
#"')"*% "
'*$%&'
('!(*! 0(**('1.
'#-$!& &'2
") (--
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
SN54ABT162823A . . . WD PACKAGE
SN74ABT162823A . . . DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1CLR
1OE
1Q1
GND
1Q2
1Q3
V
CC
1Q4
1Q5
1Q6
GND
1Q7
1Q8
1Q9
2Q1
2Q2
2Q3
GND
2Q4
2Q5
2Q6
V
CC
2Q7
2Q8
GND
2Q9
2OE
2CLR
1CLK
1CLKEN
1D1
GND
1D2
1D3
V
CC
1D4
1D5
1D6
GND
1D7
1D8
1D9
2D1
2D2
2D3
GND
2D4
2D5
2D6
V
CC
2D7
2D8
GND
2D9
2CLKEN
2CLK
相關PDF資料 |
PDF描述 |
|---|---|
| SNJ54ABT16373A | 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SNJ54ABT16825WD | 18-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| SNJ54AC573J | OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS |
| SNJ54AC573FK | OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS |
| SNJ54AC573W | OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SNJ54ABT162827AWD | 制造商:TI 制造商全稱:Texas Instruments 功能描述:20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| SNJ54ABT162841WD | 制造商:TI 制造商全稱:Texas Instruments 功能描述:20-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SNJ54ABT16373A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS |
| SNJ54ABT16373AWD | 制造商:Texas Instruments 功能描述: |
| SNJ54ABT16374AWD | 制造商:Texas Instruments 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。