參數(shù)資料
型號： SN75LVDT388DBT
廠商： Texas Instruments, Inc.
英文描述： HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
中文描述： 高速差分線路接收器
文件頁數(shù)： 5/15頁
文件大小： 205K
代理商： SN75LVDT388DBT
SN65LVDS386, SN65LVDT386, SN75LVDS386, SN75LVDT386
SN65LVDS388, SN65LVDT388, SN75LVDS388, SN75LVDT388
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SLLS394A – SEPTEMBER 1999 – REVISED DECEMBER 1999
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
100
UNIT
mV
VITH+
VITH–
VOH
VOL
Positive–going differential input voltage threshold
Negative–going differential input voltage threshold
See Figure 1 and Table 1
–100
mV
High–level output voltage
IOH = –8 mA
IOL = 8 mA
Enabled,
2.4
3
V
Low–level output voltage
0.2
0.4
V
ICC
Supply current
No load
50
70
mA
Disabled
3
’LVDS
VI = 0 V
VI = 2.4 V
VI = 0 V, other input open
VI = 2.4 V, other input open
VIA= 0 V,
VIA= 2.4 V,
VIA= 0.2 V,
VIA= 2.4 V,
VCC = 0 V,
VCC = 0 V,
VIH = 2 V
VIL = 0.8 V
VO = 0 V
VO = 3.6 V
VID = 0.4 sin 2.5E09 t V
VID = 0.4 sin 2.5E09 t V
–13
–20
II
Input current (A or B inputs)
–1.2
–3
μ
A
’LVDT
–40
–2.4
IID
Differential input current |IIA – IIB|
‘LVDS
VIB = 0.1V,
VIB = 2.3 V
VIB = 0V,
VIB = 2.2 V
VI=2.4 V
VI=2.4 V
±
2
μ
A
IID
Differential input current (IIA – IIB)
‘LVDT
1.5
2.2
mA
II(OFF)
II(OFF)
IIH
IIL
Power–off Input current (A or B inputs)
‘LVDS
12
±
20
±
40
10
μ
A
μ
A
μ
A
μ
A
Power–off Input current (A or B inputs)
‘LVDT
High–level input current (enables)
Low–level input current (enables)
10
±
1
10
IOZ
High impedance output current
High–impedance output current
μ
A
CIN
Z(t)
All typical values are at 25
°
C and with a 3.3 V supply.
Input Capacitance, A or B input to GND
5
pF
Termination impedance
88
132
switching characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
2.6
MAX
UNIT
ns
tPLH
tPHL
tr
tf
tsk(p)
tsk(o)
tsk(pp)
tPZH
tPZL
tPHZ
tPLZ
All typical values are at 25
°
C and with a 3.3 V supply.
tsk(o) is the magnitude of the time difference between the tPLH or tPHL of all drivers of a single device with all of their inputs connected together.
§tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate
with the same supply voltages, at the same temperature, and have identical packages and test circuits.
Propagation delay time, low-to-high-level output
1
4
Propagation delay time, high-to-low-level output
1
2.5
4
ns
Differential output signal rise time
500
800
1200
ps
Differential output signal fall time
See Figure 2
500
800
1200
ps
Pulse skew (|tPHL – tPLH|)
Output skew
Part-to-part skew§
150
600
ps
100
400
ps
1
ns
Propagation delay time, high-impedance-to-high-level output
7
15
ns
Propagation delay time, high-impedance-to-low-level output
See Figure 3
7
15
ns
Propagation delay time, high-level-to-high-impedance output
7
15
ns
Propagation delay time, low-level-to-high-impedance output
7
15
ns
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