
SN65C1154, SN75C1154
QUADRUPLE LOW-POWER DRIVERS/RECEIVERS
SLLS151D
–
DECEMBER 1988
–
REVISED APRIL 2003
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over operating free-air temperature range, V
DD
= 12 V, V
SS
=
–
12 V,
V
CC
= 5 V
±
10% (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
4.5
MAX
UNIT
VOH
High level output voltage
High-level output voltage
VIL = 0.8 V,
See Figure 1
RL = 3 k
VDD = 5 V,
VDD = 12 V,
VDD = 5 V,
VDD = 12 V,
VSS =
–
5 V
VSS =
–
12 V
VSS =
–
5 V
VSS =
–
12 V
4
V
,
10
10.8
VOL
Low-level output voltage
(see Note 4)
VIH = 2 V,
See Figure 1
RL = 3 k
–
4.4
–
4
V
,
–
10.7
–
10
IIH
IIL
High-level input current
VI = 5 V,
VI = 0,
See Figure 2
1
μ
A
μ
A
Low-level input current
See Figure 2
–
1
IOS(H)
High-level short-circuit
output current
VI= 0 8 V
VI = 0.8 V,
VO= 0 or VSS
VO = 0 or VSS,
See Figure 1
See Figure 1
7 5
–
7.5
19 5
–
19.5
mA
–
12
IOS(L)
Low-level short-circuit
output current
VI= 2 V
VI = 2 V,
VO= 0 or VDD
VO = 0 or VDD,
See Figure 1
7 5
7.5
12
19 5
19.5
mA
IDD
Supply current from VDD
No load,
All inputs at 2 V or 0.8 V
VDD = 5 V,
VDD = 12 V,
VDD = 5 V,
VDD = 12 V,
VSS =
–
5 V
VSS =
–
12 V
VSS =
–
5 V
VSS =
–
12 V
See Note 5
115
250
μ
A
115
250
ISS
Supply current from VSS
No load,
All inputs at 2 V or 0.8 V
–
115
–
250
μ
A
–
115
–
250
ro
Output resistance
VDD = VSS = VCC = 0,
VO =
–
2 V to 2 V,
300
400
All typical values are at TA = 25
°
C.
Not more than one output should be shorted at one time.
NOTES:
4. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only.
5. Test conditions are those specified by TIA/EIA-232-F.
switching characteristics, V
DD
= 12 V, V
SS
=
–
12 V, V
CC
= 5 V
±
10%, T
A
= 25
°
C (see Figure 3)
PARAMETER
TEST CONDITIONS
RL = 3 to 7 k
,
RL = 3 to 7 k
,
RL = 3 to 7 k
,
RL = 3 to 7 k
,
RL = 3 to 7 k
,
RL = 3 to 7 k
,
RL = 3 to 7 k
,
MIN
TYP
MAX
UNIT
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
V/
μ
s
tPLH
tPHL
tTLH
tTHL
tTLH
tTHL
SR
§
tPHL and tPLH include the additional time due to on-chip slew rate control and are measured at the 50% points.
Measured between 10% and 90% points of output waveform
#Measured between 3 V and
–
3 V points of output waveform (TIA/EIA-232-F conditions) with all unused inputs tied either high or low
Propagation delay time, low- to high-level output
§
Propagation delay time, high- to low-level output
§
Transition time, low- to high-level output
Transition time, high- to low-level output
Transition time, low- to high-level output#
Transition time, high- to low-level output#
CL = 15 pF
1.2
3
CL = 15 pF
2.5
3.5
CL = 15 pF
0.53
2
3.2
CL = 15 pF
0.53
2
3.2
CL = 2500 pF
CL = 2500 pF
CL = 15 pF
1
2
1
2
Output slew rate
4
10
30