參數(shù)資料
型號(hào): SN74S1051
廠商: California Micro Devices Corporation
英文描述: 12-BIT SCHOTTKY BARRIER DIODE BUS TERMINATOR
中文描述: 12位肖特基二極管總線終端
文件頁(yè)數(shù): 2/2頁(yè)
文件大?。?/td> 172K
代理商: SN74S1051
1998 California Micro Devices Corp. All rights reserved.
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
2
4 / 98
CALIFORNIA MICRO DEVICES
STANDARD SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Channel clamp current (continuous)
Operating Temperature
Storage Temperature
Package Power Rating
Symbol
V
DD
I
clamp
Rating
-0.3V to +7V
±50mA
0
O
C to 70
O
C
-65
O
C to +150
O
C
625mW, max.
Tstg
Parameter
Diode foward voltage
Conditions
To V
DD
Min
Typ
0.55V
0.70V
0.50V
0.65V
Max
0.70V
0.90V
0.65V
0.85V
<400pS
5μA
I
F
= 16 mA
I
F
= 50 mA
I
F
= 16 mA
I
F
= 50 mA
0.55V
From GND
0.50V
Reverse Recovery Time (See Note 1)
Channel leakage
Input Capacitance
ESD Protection
I
F
= 50mA (estimated)
0
V
IN
V
DD
f = 1 MHz, V
IN
= 2.5V, T
A
= 25
O
C, V
DD
= 5.0V
MIL-STD-883, Method 3015
0.1μA
5pF
4KV
The absolute maximum ratings are limiting values, to be applied individually, beyond which the device may be permanently damaged. Functional
operation under any of these conditions is not guaranteed. Exposing the device to its absolute maximum rating may
affect its reliability.
Note 1:
The test circuit depicts the Schottky diodes in their typical application. The impact of a reverse recovery time is measured
using a narrow pulse with 670- pS rise and fall times. This pulse propagates down a 60 cm, 54 ohm strip line fabricated
on a multi-layer, controlled impedance printed circuit board. In testing the ground clamp diode, the negative going edge
of the pulse causes a reflection which forces the diode under test to become forward biased. The positive going edge of
the pulse attempts to pull this diode out of forward conduction. A reverse recovery phenomenon would cause a delay
between the known arrival time of the positive edge and the observed edge due to the time it takes for the forward biased
diode to actually become reversed biased. In this measurement, however, there is no observable difference and therefore
no delay for the positive edge due to the presence of the diode. The waveforms are adjusted to individually test the
ground and V
DD
clamps. See test circuit.
Test Circuit. Line length, pulse width and duty cycle are selected such as that only one reflection is involved
in the measurement.
V
Diode
under
test
DD
Z , L
0
ABT16244A
Pulse
Generator
DIODE CHARACTERISTICS (T
A
= 0
O
to 70
O
C)
N
O
I
T
A
M
R
O
F
N
I
e
b
p
a
T
N
S
G
m
u
N
I
N
R
t
a
E
P
D
g
R
O
n
e
d
r
T
R
O
s
T
5
0
1
S
4
7
A
P
D
R
A
D
N
A
T
S
e
g
a
k
c
a
P
r
e
4
7
s
n
1
e
t
r
N
S
e
b
u
T
l
e
R
5
0
1
S
R
&
g
n
r
0
1
S
4
7
a
M
t
a
N
S
P
6
w
o
C
O
S
N
S
1
5
SN 74S1051
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