參數(shù)資料
型號(hào): SN74LVTH573ZQNR
廠商: Texas Instruments
文件頁數(shù): 23/25頁
文件大?。?/td> 0K
描述: IC ABT OCT TRANSP D LATCH 20-BGA
標(biāo)準(zhǔn)包裝: 1,000
系列: 74LVTH
邏輯類型: D 型透明鎖存器
電路: 8:8
輸出類型: 三態(tài)
電源電壓: 2.7 V ~ 3.6 V
獨(dú)立電路: 1
延遲時(shí)間 - 傳輸: 2.9ns
輸出電流高,低: 32mA,64mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-VFBGA
供應(yīng)商設(shè)備封裝: 20-BGA MICROSTAR JUNIOR(4x3)
包裝: 帶卷 (TR)
SN54LVTH573, SN74LVTH573
3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS687H MAY 1997 REVISED SEPTEMBER 2003
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.5 V
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
6 V
Open
GND
500
Ω
500
Ω
Data Input
Timing Input
1.5 V
2.7 V
0 V
1.5 V
2.7 V
0 V
2.7 V
0 V
1.5 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPLH
VOH
VOL
1.5 V
2.7 V
0 V
1.5 V
Input
1.5 V
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
3 V
0 V
1.5 V
VOL + 0.3 V
1.5 V
VOH 0.3 V
≈0 V
2.7 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6 V
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
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